Jinwoo Jeon

Mr. Jinwoo Jeon

orcid

Research Focus & Metrics

Academic Career Length

18Years (2009-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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5 October 2020 in IEEE Journal of Solid-State Circuits
Verified
Journal Article
Closed access
HKHyunjin Kim
Hyunjin Kim
JMJunyoung Maeng
Junyoung Maeng
IPInho Park
Inho Park
JJJinwoo Jeon
Jinwoo Jeon
DLDongju Lim
Dongju Lim
CKChulwoo Kim
Chulwoo Kim
This article presents a multi-input single-inductor multi-output energy-harvesting interface that extracts power from three independent sources and regulates three output voltages. The converter employs the proposed double-conversion rejection technique to reduce the double-converted power by up to 81.8% under the light-load condition and operates in various power conversion modes, including the proposed buck-based dual-conversion mode, to improve the power conversion efficiency and maximum load power. The proposed adaptive peak inductor current controller determines the inductor charging period, and the proposed digitally controlled zero-current detector detects the optimum zero-current point according to the operating mode. The proposed converter achieves a peak end-to-end efficiency of 90.2% and a maximum output power of 24 mW, indicating the improvements of approximately 7.52% and 1.85 times, respectively, compared with those of conventional buck-boost converters.

18 January 2021 in IEEE Journal of Solid-State Circuits
Verified
Journal Article
Closed access
HKHyunjin Kim
Hyunjin Kim
JMJunyoung Maeng
Junyoung Maeng
IPInho Park
Inho Park
JJJinwoo Jeon
Jinwoo Jeon
YCYohan Choi
Yohan Choi
CKChulwoo Kim
Chulwoo Kim
This article proposes a continuously scalable-conversion-ratio (CSCR) switched-capacitor (SC) energy harvesting interface that extracts power from a thermoelectric generator (TEG), regulates a 0.75-V output load, and manages a 1.2-1.45-V battery. The structure employs the proposed CSCR SC converter to improve the power conversion efficiency up to 7.9% higher than that of the conventional converter. Moreover, the structure utilizes a proposed SC-based pulse frequency modulation (PFM) maximum power point tracking (MPPT) method to extract power from a TEG with an MPPT efficiency above 98.15%. In addition, the proposed interface adopts a flying capacitor sharing scheme for the dual-mode operation of the SC interface to increase both the peak end-to-end efficiency and maximum output power. With a 180-nm CMOS process, the proposed interface achieves a peak end-to-end efficiency of 85.4% and maximum output power of 20.8 mW.

23 January 2019 in Environmental Geochemistry and Health
Verified
Journal Article
Closed access
PDF file
ICIn-Gyu Cho
In-Gyu Cho
MPMin-Kyu Park
Min-Kyu Park
HCHye-Kyung Cho
Hye-Kyung Cho
JJJinwoo Jeon
Jinwoo Jeon
Sung-Eun LeeSung-Eun Lee
Sung-Eun Lee
Sung-Deuk  ChoiSung-Deuk Choi
Sung-Deuk Choi

11 November 2022 in IEEE Journal of Solid-State Circuits
Verified
Journal Article
Closed access
IPInho Park
Inho Park
JJJinwoo Jeon
Jinwoo Jeon
HKHyunjin Kim
Hyunjin Kim
TPTaehyeong Park
Taehyeong Park
JJJunwon Jeong
Junwon Jeong
CKChulwoo Kim
Chulwoo Kim
This article presents a thermoelectric (TE) energy-harvesting interface with a reconfigurable dc–dc converter and a time-based instantaneous linear extrapolation (ILE) maximum power point tracking (MPPT) method. The proposed reconfigurable dc–dc converter comprises five switches for buck–boost operation and an additional switch for a dual-conversion mode in which battery power and TE generator (TEG) power are extracted in one cycle; therefore, the improved power density is achieved. The proposed ILE MPPT algorithm does not require TEG disconnection from the dc–dc converter, ensuring continuous TE energy extraction. The proposed MPPT method modulates the open-circuit voltage of TEG by performing linear extrapolation with a fully integrated circuit based on the steady-state voltage ripple information. The proposed interface is fabricated using a 180-nm CMOS process. The peak end-to-end efficiency of 90.48% is achieved with 0.2-V input voltage. The MPPT errors are measured up to 2.0% for the input capacitance variation and up to 1.067% for the equivalent resistance of TEG variation.

19 October 2021 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
IPInho Park
Inho Park
JMJunyoung Maeng
Junyoung Maeng
JJJinwoo Jeon
Jinwoo Jeon
HKHyunjin Kim
Hyunjin Kim
CKChulwoo Kim
Chulwoo Kim
In this letter, a four-phase hybrid step-up/step-down dc–dc converter with a delay-based zero-current detector (ZCD) is proposed. The proposed power stage operates in step-up or step-down mode depending on the target output voltage. It utilizes hybrid switched-inductor-capacitor and dual-path topologies with multiphase operation to reduce conduction loss due to the dc resistance of the inductor by reducing the rms inductor current ( IL ). The delay-based ZCD determines the zero-current point of IL with a five-bit binary signal to compensate for the propagation delay between the control and the output signals of the driver. The system is fabricated using 180-nm CMOS technology. The power density is 1.838 A/mm 2 , and the peak efficiency is measured at 89.49% and 86.83% in the step-down and step-up mode, respectively, with a load current range of up to 2 A.