Quantum-dot Cellular Automata (QCA) is a new nano-scale technology that due to making significant improvements in the design of electronic circuits can be considered as an appropriate alternative to CMOS technology. The Arithmetic Logic Unit (ALU) is a fundamental component of the Central Processing Unit (CPU) to carry out the arithmetic and logical operations that multiplexer and full adder play an important role in its operations. In this paper, based on the extracted features of the arithmetic operations of the ALU, we propose a new special low-complexity QCA 4:1 multiplexer, which is application-specific to the proposed ALU. Moreover, a new QCA full adder is proposed based on the cell interaction. Likewise, a QCA multilayer ALU structure is designed based on the validated proposed structures to carry out four logical and eight arithmetic operations. The functional correctness of the proposed structures are evaluated by QCADesigner tool; also, QCAPro as an accurate power estimator tool is applied to investigate their power dissipation. The simulation results demonstrate that the proposed structures outperform in comparison to counterpart designs in terms of cell number, area, latency, and power consumption.

A simulation study of a Cu(In1 − xGax)Se2 (CIGS) thin film solar cell has been carried out with maximum efficiency of 24.27 % (Voc = 0.856 V, Jsc = 33.09 mA/cm2 and FF = 85.73 %). This optimized efficiency is obtained by determining the optimum band gap of the absorber and varying the doping concentration of constituent layers. The Ga content denoted by x = Ga/(In + Ga) is selected as 0.35 which provides the optimum band gap of absorber layer as 1.21 eV. Theoretically, the effects of Ga fraction “x” on CIGS absorber band gap are investigated and to avoid the lattice mismatch effect, the efficiency measurements due to the CIGS band gaps >1.21 eV have not come to the consideration. A one-dimensional simulator ADEPT/F 2.1 has been used to analyze the fabricated device parameters and hence to calculate open circuit voltage, short circuit current, fill factor and efficiency.

Quantum-dot cellular automata (QCA) is a rapid-growing nano-technology worthy of designing ultra-dense, low-power and high-performance digital circuits. In parallel computing, the multistage interconnection network (MIN) provides maximum bandwidth to the components and minimum latency access to the memory modules. Much research has been conducted on CMOS based MINs for parallel computing. However, the QCA based switching network is still underexplored. This paper proposes the QCA architecture of a new single-layer butterfly switching network (BSN). To realize it, at first, we design an efficient 2×2 switching element (SE) by utilizing a modified majority ( ${(M_{[x,y]})}$ ) gate, that is fully utilized (i.e., no fixed logic like “0” and “1” at the inputs). The use of such fully utilized majority gate over partially utilized majority (PUM) logic made the proposed SE more cost-efficient and versatile, and therefore it is used as the building block for designing the switching network. In this paper, we deploy the SE to realize 4×4 and 8×8 BSNs. We also show how the design can be extended for an N×N BSN. All the proposed circuits have been modeled and verified by QCADesigner. Moreover, QCAPro is used for estimating the average switching and leakage energy dissipation of the proposed circuits. The results show considerable enhancement in terms of cell count, device area and latency, and thereby outperform all reported prior designs.