Rotational spectra of tropolone in the ground vibronic state were measured by microwave spectroscopy. Due to the proton tunneling motion, the ground state is split into a doublet, of which the lower and upper components are denoted by $0^{+}$ and $0^{-},$ respectively. In the frequency region 28–84 GHz, more than 150 pure rotational transitions obeying a-type selection rules were observed for each of the $0^{+}$ and $0^{-}$ states. Additionally, tunneling-rotation transitions connecting the lower ${\text{(0}}^{+})$ and upper ${\text{(0}}^{-})$ components of the tunneling doublet were observed by pulsed Fourier transform microwave spectroscopy. Twenty-three P- and Q-branch lines were observed in the frequency region of 10–18 GHz, and analyzed combined with the pure rotational transitions for each of the $0^{+}$ and $0^{-}$ states. The proton tunneling splitting in the ground state, ${\Delta }_0\text{=29}$ $\text{193.788±0.026\hspace{0.17em}}\mathrm{MHz},$ and the tunneling-rotation interaction constant $\text{F=16.456±0.015\hspace{0.17em}}\mathrm{MHz},$ were determined, as well as the rotational and centrifugal distortion constants. The dipole moment along the a axis, responsible for the rotational transitions, was determined to be $\text{3.428±0.050}$ and $\text{3.438±0.050\hspace{0.17em}}\mathrm{D}$ for the $0^{+}$ and $0^{-}$ states, respectively.

Recently there has been increased demand for not only ultra-low power, but also high performance, even in standby-power-critical applications. Sensor nodes, for example, need a microcontroller unit (MCU) that has the ability to process signals and compress data immediately. A previously reported 130nm CMOS and FeRAM-based MCU features zero-standby power and fast wakeup operation by incorporating FeRAM devices into logic circuits [1]. The 8MHz speed, however, was not sufficiently high to meet application requirements, and the FeRAM process also has drawbacks: low compatibility with standard CMOS, and write endurance limitations. A spintronics-based nonvolatile integrated circuit is a promising option to achieve zero standby power and high-speed operation, along with compatibility with CMOS processes. In this work, we demonstrate a fully nonvolatile 16b MCU using 90nm standard CMOS and three-terminal SpinRAM technology. It achieves 20MHz, 145μW/MHz operation with a 1V supply in the active state, and 4.5μW intermittent operation with 120ns wakeup time and 0.1% active ratio, without forwarding of re-boot code from memory. The features provide sufficiently long battery life to achieve maintenance-free sensor nodes.

The development of new functional memories using emerging nonvolatile devices has been widely investigated. Spin-transfer torque magnetoresistive random access memory (STT-MRAM) has become new technology platform to overcome the issue in power consumption of logic for the application from IoT to AI; however, STT-MRAM has a tradeoff relationship between endurance, retention, and access time. This is because the MTJ device used in STT-MRAM is a two-terminal device, and excessive read current for high-speed readout can cause unexpected data writing, or so-called read disturbance. In order to meet the demand for the realization of high-speed nonvolatile memory, the development of new memories based on innovative circuit, device, and integration process is required. In this article, we demonstrate an SOT-MRAM, a nonvolatile memory using MTJ devices with spin-orbit-torque (SOT) switching that have a read-disturbance-free characteristic. The SOT-MRAM fabricated using a 55-nm CMOS process is implemented in a dual-port configuration utilizing a three-terminal structure of the device for realizing a wide bandwidth applicable to high-speed applications. In addition, a read-energy reduction technique called a self-termination scheme is also implemented. Through the measurement results of the fabricated prototype chip, we will demonstrate the proposed SOT-MRAM achieves 60-MHz write and 90-MHz read operations with 1.2-V supply voltage under a magnetic-field-free condition.

Nonvolatile (NV) memory is a key element for future high-performance and low-power microelectronics. Among the proposed NV memories, spintronics-based ones are particularly attractive for applications, owing to their low-voltage and high-speed operation capability in addition to their high-endurance feature. There are three types of spintronics devices with different writing schemes: spin-transfer torque (STT), spin-orbit torque (SOT), and electric field (E-field) effect on magnetic anisotropy. The NV memories using STT have been studied and developed most actively and are about to enter into the market by major semiconductor foundry companies. On the other hand, a development of the NV memories using other writing schemes are now underway. In this review article, first, the recent advancement of the spintronics device using STT and the NV memories using them are reviewed. Next, spintronics devices using the other two writing schemes (SOT and E-field) are briefly reviewed, including issues to be addressed for the NV memories application.

The demand for energy-efficient, high-performance microcontroller units (MCUs) for the use in power-supply-critical Internet-of-Things (IoT) sensor-node applications has witnessed a substantial increase. In response, research concerning the development of several low-power-consuming MCUs has been actively pursued. The performance level of such MCUs, however, has not been sufficient, thereby rendering them non-feasible for the use in IoT sensor-node applications that process a large number of received signals immediately followed by extraction of valuable information from them to limit data transferred to a data center. To realize next-generation IoT systems based on intelligent sensor-node application, ultra-low-power high-performance MCUs need to be developed. This paper presents an ultra-low-power-consuming and high-performance MCU configuration based on the spintronics device technology, using which all modules are non-volatilized, and any wasteful power consumption is eliminated by controlling the power supplied independently to each module. By incorporating a reconfigurable accelerator module, for performing various signal-processing procedures in sensor-node applications, and a memory controller, which can speed up the entire system by relaxing the data-transfer bottleneck of logic and memory, the proposed MCU configuration achieves ultra-low power consumption and high-speed operation. As confirmed by the results obtained via measurements performed on a fabricated chip, the proposed MCU design, on average, consumed 47.14 μW power at an operating frequency of 200 MHz. This corresponds to the world's highest signal-processing performance and energy efficiency of highly functional IoT sensor nodes powered by harvested energy.

We investigated properties of Co/Pt multilayer for reference layer in CoFeB–MgO magnetic tunnel junctions with perpendicular easy axis. The sufficient thermal stability factor of 284 was obtained under zero applied field in 40-nm-diameter Co/Pt multilayer based reference layer annealed at 350 °C. By applying a synthetic ferrimagnetic (SyF) structure to the Co/Pt multilayer based reference layer, the shift of the center of minor resistance-magnetic field curves was suppressed, leading to higher thermal stability of antiparallel magnetization configuration than that without a SyF structure.