The paper describes the FPGA implementation of a novel position evaluation algorithm based on the time difference of arrival (TDOA) principle that combines the characteristics of an Orthogonal Frequency Division Modulation (OFDM) symbol with the properties of the Zadoff-Chu mathematical sequences. The resulting system is highly scalable and its characteristics are easily adaptable to different operating scenarios. The algorithm has been implemented using the Stratix IV-E EP4SGX70HF35C3 FPGA, requiring about 112k bit of memory and less than 44k logic elements of which about 16k are registers. The paper describes the algorithm and its FPGA implementation along with experimental results validating the system performance even in the presence of multipath interferences and showing precision in target position estimation that is better than 2 cm.

A novel method for distance estimation is introduced, based on an OFDM signal combined with the Zadoff-Chu Sequences. By exploiting the properties of these sequences it is possible to evaluate the distance between a transmitter and a receiver with a very good precision and accuracy. The technique effectiveness is demonstrated in a real operating environment by measuring the distance between two active devices and using a pair of Right-Hand circularly polarized helical antennas, achieving a mean final error of 2.94 cm and a mean standard deviation of 0.95 cm with only 20 MHz of bandwidth. The proposed technique can be used in the implementation of indoor positioning systems.

This paper presents a new framework for the design optimization of a CMOS down-conversion mixer based on a conventional double balanced Gilbert cell. The framework exploits the g _m /I _D methodology to find the transistors' dimensions that optimize the tradeoff between conversion gain, noise figure, third-order intercept and power DC consumption of the mixer. The mixer has been designed using a 0.13 μm process from IHP Microelectronics, and it exhibits a conversion gain of 13.1 dB at 0 dBm local oscillator's power. The average noise figure is 11.9 dB, the input third-order intercept is -2.8 dBm and the output third-order intercept is 9.7 dBm. Finally, the chip-core without bonding pads measures only 0.028 mm by 0.031 mm and it dissipates 1.5 mW with a 1.5 V supply.

The paper introduces a novel method for distance estimation based on an OFDM signal combined with the Zadoff-Chu sequences. By exploiting the properties of these sequences, it is possible to evaluate the distance between two active nodes with a very good precision and accuracy. The technique effectiveness is demonstrated by measuring the distance between a single transmitter and a synchronized receiver connected through cables with different lengths. The mean final accuracy of 0.2 cm joint to a mean final precision of 0.65 cm with 100 MHz of bandwidth is achieved. The proposed technique can be advantageously used in indoor positioning systems design.

In this paper we exploit the gm over ID methodology to optimize the design of a four stage conventional Distributed Amplifier (DA) for an Ultra-Wide Band positioning system. The W/L ratio and the DC-biasing of the amplifier's transistors are determined according to the gm over ID methodology by using a series of lookup tables generated starting from the model of the devices. The DA was designed using the IHP 0.13 μm SiGe process and provides a 14 dB gain over a bandwidth of 10.6 GHz. The input/output return loss of the amplifier is lower than -17 dB over the entire bandwidth, with an average noise figure of 1.95 dB and a 26 mW DC-power consumption.

The paper presents a systematic methodology for designing a CMOS down-conversion mixer based on a conventional double balanced Gilbert cell. The design flow exploits the gm/ID methodology in order to optimize the size of the transistors that allow achieving the best tradeoff between conversion gain, noise figure, third-order intercept and power DC consumption of the entire system. The mixer was designed using a 0.13 μm process from IHP Microelectronics, and it exhibits a final conversion gain of 10.3 dB @ 0 dBm local oscillator power. The average noise figure is about 12 dB and the input third-order intercept is 0 dBm. Finally, the chip-core without bonding pads measures only 0.028 mm × 0.034 mm and it dissipates 4.4 mW with 1.5 V supply.