The synchronization between wireless sensor nodes is a big issue in all those low-cost systems in which each node performs measurements using its own sensors and stores the measured values locally. In the absence of synchronization, it is impossible to relate all the measurements coming from the different sub-systems on a single time scale for the extraction of complex features. The importance of this issue is even bigger when the sensors’ sampling rate is high as for the Inertial Measurement Unit platforms. The paper addresses the issue of managing a large multi-sensor platform for off-line activities with a reduced sensor node complexity and guaranteeing the perfect synchronization for each acquired sample. The new simple and light algorithm proposed overcomes the limits of the commonly used protocols and it is suitable for this kind of applications. The entire system consists of an Android smartphone, a master unit and several slave units. Each board has a 9 Degrees of Freedom (DoF) Inertial Measurement Unit, a micro-SD for data storage and an ARM®Cortex™-M4 CPU SoC supporting the protocols for both Bluetooth Low Energy (BLE) 5 and 2.4 GHz custom communications.
A configuration for a slotted patch antenna is introduced which allows two separate operating frequencies. Both of these frequencies are associated with a radiating mode almost identical to that of a standard patch. The two resonances are related to the patch width and the slot/patch length, respectively.
One of the objectives of the medicine is to modify patients’ ways of living. In this context, a key role is played by the diagnosis. When dealing with acquisition systems consisting of multiple wireless devices located in different parts of the body, it becomes fundamental to ensure synchronization between the individual units. This task is truly a challenge, so one aims to limit the complexity of the calculation and ensure long periods of operation. In fact, in the absence of synchronization, it is impossible to relate all the measurements coming from the different subsystems on a single time scale for the extraction of complex characteristics. In this paper, we first analyze in detail all the possible causes that lead to have a system that is not synchronous and therefore not usable. Then, we propose a firmware implementation strategy and a simple but effective protocol that guarantees perfect synchrony between the devices while keeping computational complexity low. The employed network has a star topology with a master/slave architecture. In this paper a new approach to the synchronization problem is introduced to guarantee a precise but not necessarily accurate synchronization between the units. In order to demonstrate the effectiveness of the proposed solution, a platform consisting of two different types of units has been designed and built. In particular, a nine Degrees of Freedom (DoF) Inertial Measurement Unit (IMU) is used in one unit while a nine-DoF IMU and all circuits for the analysis of the superficial Electromyography (sEMG) are present on the other unit. The system is completed by an Android app that acts as a user interface for starting and stopping the logging operations. The paper experimentally demonstrates that the proposed solution overcomes all the limits set out and it guarantees perfect synchronization of the single measurement, even during long-duration acquisitions. In fact, a less than 30 s time mismatch has been registered for a 24 h test, and the possibility to perform complex post-processing on the acquired data with a simple and effective system has been proven.
12 March 2020 in IEEE Transactions on Circuits and Systems I: Regular Papers
The paper describes the FPGA implementation of a novel position evaluation algorithm based on the time difference of arrival (TDOA) principle that combines the characteristics of an Orthogonal Frequency Division Modulation (OFDM) symbol with the properties of the Zadoff-Chu mathematical sequences. The resulting system is highly scalable and its characteristics are easily adaptable to different operating scenarios. The algorithm has been implemented using the Stratix IV-E EP4SGX70HF35C3 FPGA, requiring about 112k bit of memory and less than 44k logic elements of which about 16k are registers. The paper describes the algorithm and its FPGA implementation along with experimental results validating the system performance even in the presence of multipath interferences and showing precision in target position estimation that is better than 2 cm.