Cost of data centers has risen sharply in the past few years. Today, it represents about 3% of total US energy consumption with projections to increase further in the coming years. In this paper, we focus on the server infrastructure and observe that workload consolidation techniques, which maximize power efficiency of server systems, do not automatically optimize the overall system power efficiency especially when compute engines and the corresponding on-board cooling systems are considered holistically. We design SpinSmart, a framework that explores optimal server fan speeds to minimize the overall system energy consumption. We explore core capping strategies that estimate the desired number of CPU cores to be used at any given time to minimize combined CPU+fan power. Our experimental results show that we are able to achieve 1) energy savings of up to 10% of total energy and 80% of cooling energy when compared to workload consolidation without core capping strategy; 2) cooling energy savings up to 42% when compared to the strategy that randomly assigns jobs to all the servers and cores.

The graph structure and graph partitioning algorithms are widely used in many fields of scientific computing and artificial intelligence. With the development of big data, the magnitude of graph is increasing rapidly, which makes high performance graph partitioning library extremely important. In this paper, we proposed swMETIS, a high performance graph partitioning library on Sunway manycore architecture. To exploit more parallelism and performance on Sunway manycore architecture, we introduce the concept of hierarchical scheme and propose an instruction-level hierarchical scheme for the multilevel k-way partitioning algorithm. This scheme allows us to exploit two levels of parallelism, which developed more parallelism than traditional one-level parallel schemes. Moreover, we propose a dropping strategy with threshold and a continuous cycle layout which effectively balances the processor load, improved the data access efficiency and exactly offload the processor load to more powerful CPE array. Our experimental results show that swMETIS achieving 9.52x speedup on average over the state-of-the-art ParMETIS library.