We investigated the lateral distribution of the equilibrium carrier concentration (n₀) along the channel and the effects of channel length (L) on the source-drain series resistance (R_ext) in the top-gate self-aligned (TG-SA) coplanar structure amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). The lateral distribution ofn₀across the channel was extracted using the paired gate-to-source voltage (V_GS)-based transmission line method and the temperature-dependent transfer characteristics obtained from the TFTs with differentLs.n₀abruptly decreased with an increase in the distance from the channel edge near the source/drain junctions; however, much smaller gradient ofn₀was observed in the region near the middle of the channel. The effect ofLon theR_extin the TG-SA coplanar a-IGZO TFT was investigated by applying the drain current-conductance method to the TFTs with variousLs. The increase ofR_extwas clearly observed with an increase inLespecially at lowV_GSs, which was possibly attributed to the enhanced carrier diffusion near the source/drain junctions due to the larger gradient of the carrier concentration in the longer channel devices. Because the lateral carrier diffusion and the relatively highR_extare the critical issues in the TG-SA coplanar structure-based oxide TFTs, the results in this work are expected to be useful in further improving the electrical performance and uniformity of the TG-SA coplanar structure oxide TFTs.

We propose analytical current and capacitance models for amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) for the simulation of a-IGZO TFT-based-circuits. The proposed models are composed of physical parameters including the subgap density of states and confirmed by comparing the calculated current-voltage and capacitance-voltage characteristics with measured ones. The proposed models are expected to be useful for the optimization of fabrication processes and for the prospective estimation of the effect of process conditions on the circuit performances. Through the circuit simulation implemented with the proposed models, we verify that the proposed analytical model and simulation methodology can be applicable to the expectation of the complicated circuit behaviors. The simulation framework with proposed analytical models is expected to be a powerful tool in the optimization process and circuit design with amorphous oxide semiconductor TFTs including a-IGZO TFTs.

In this work, we investigated the effects of low-temperature argon (Ar)-plasma surface treatments on the physical and chemical structures of p-type tin oxide thin-films and the electrical performance of p-type tin oxide thin-film transistors (TFTs). From the x-ray photoelectron spectroscopy measurement, we found that SnO was the dominant phase in the deposited tin oxide thin-film, and the Ar-plasma treatment partially transformed the tin oxide phase from SnO to SnO ₂ by oxidation. The resistivity of the tin oxide thin-film increased with the plasma-treatment time because of the reduced hole concentration. In addition, the root-mean-square roughness of the tin oxide thin-film decreased as the plasma-treatment time increased. The p-type oxide TFT with an Ar-plasma-treated tin oxide thin-film exhibited excellent electrical performance with a high current on–off ratio (5.2 × 10 ⁶ ) and a low off-current (1.2 × 10 ⁻¹² A), which demonstrates that the low-temperature Ar-plasma treatment is a simple and effective method for improving the electrical performance of p-type tin oxide TFTs.

The authors investigated the effects of active layer thickness on the structual, optical, and electrical characteristics of p-type Cu2O thin-film transistors (TFTs). It was observed that as the channel thickness increases, the average grain size and root mean square roughness of the Cu2O thin films increase, but the optical transmittance notably decreases, especially in the short wavelength range below 500 nm. The p-type Cu2O TFT device exhibits the cleanest transfer function with only a small subthreshold slope when the channel thickness is 45 nm, whereas notable subthreshold slope humps are observed in the transfer curves for devices with thicker channels.

The present work investigated the electrical characteristics of Corbino structure p-type tin monoxide (SnO) thin-film transistors (TFTs) and demonstrated a high-performance complementary logic inverter composed of Corbino p-type SnO and n-type indium-gallium-zinc oxide (IGZO) TFTs. Experimental data showed that the Corbino p-type SnO TFT exhibited an almost infinite output resistance beyond pinch-off in the outer drain condition. The observed phenomenon was mainly attributed to the scaling down of the effective channel width in proportion to the effective channel length. By using the very high output resistance of the Corbino structure TFTs, we fabricated the high-gain complementary logic inverter composed of Corbino p-type SnO and n-type IGZO TFTs. The Corbino TFT-based complementary logic inverter showed a voltage gain of 92.4 at a supplied voltage of 10 V, which was significantly higher than that of 18.7 obtained from the complementary logic inverter composed of the conventional rectangular shaped TFTs.