The performance of solid state DC circuit breaker (SS-DCCB) is mainly determined by the on-state feature of power device. In this paper, an optimized low on-state voltage integrated gate commutated Thyristor (LO-IGCT) for SS-DCCB is developed. Firstly, the impacts of device parameters, including base length, carrier lifetime, emitter injection efficiencies, on on-state voltage are presented. And the boundary conditions raised by blocking voltage and controllable current requirement are analyzed. Based on that, a three-step Blocking-SOA-Emitter optimization routine is proposed. Then, the optimization methodology for doping profiles in different regions, especially in n- drift, n buffer, p+ base, n+ emitter and p+ emitter regions, is presented. The optimal values are derived with theoretical deduction or numerical calculation. After that, based the optimization result, samples of LO-IGCTs are fabricated and tested. The fabricated LO-IGCT sample shows a blocking voltage capability over 4500 V and an on-state voltage of 1.11 V at the current of 2000 A. The commercialized IGCT and IGBT optimized for high frequency applications exhibits 1.23 and 1.85 times the on-state voltage under same test configuration.

Explosion proof of power devices is important for the safe operation of high voltage direct current power transmission system based on modular multilevel converter (MMC-HVdc). Comparison of the main commercial power devices’ structures shows that the integrated gate commutated thyristor (IGCT) has the simplest housing structure, which is suitable for withstanding the extreme fault in the MMC-HVdc system. Explosion proof tests of IGCT are carried out with different distribution of destruction positions under the extreme failure in the MMC-HVdc system. The maximum surge current of IGCT is between 600 and 700 kA when 18 mF capacitor with 4500 V is discharged. IGCT with evenly distributed destruction positions shows excellent explosion proof, while IGCT with edge focusing destruction positions shows poor explosion proof. Further thermal analysis with simulation shows that IGCT's ceramic shell may suffer a huge transient thermal stress when the destruction positions focus on the edge areas. A designed gas pressure tolerance test shows that the gas pressure is in the safe area which IGCT can withstand under the extreme failure. This means that the thermal stress can be regarded as the main cause of IGCT's explosion phenomenon. Based on the explosion mechanism, an optimized IGCT with controlled punch-through design in the central area is proposed to avoid the edge area destruction under the extreme failure. And explosion proof experiment of optimized IGCT validates its excellent explosion proof under the extreme failure in the MMC-HVdc system.

Modular multilevel converter (MMC) based on IGCT with high reliability, low cost and voltage drop is a promising choice for VSC-HVDC. This paper gives a comprehensive analysis, design and experiment of shoot-through faults in IGCT-MMC. Firstly, the designed structure of the sub-module based on IGCT (IGCT-SM) is introduced and an equivalent circuit is established with accurate estimation of the stray inductances. Then, the failure processes of IGCTs and diodes are discussed in detail. Meanwhile, the mechanical stress of the connecting copper bar is analyzed during shoot-through faults. After that, an experimental platform is built for performing the shoot-through faults. Both tests with switching action and without switching action are carried out under the DC-Link capacitor and voltage with 10 mF and 2.5 kV. The results show that though IGCT can't turn off the fault current, it can withstand the fault current. The whole structure maintains stable without any cracked housing package or copper bars under the surge current of 266 kA/0.40 ms. The 24 h short-circuit test under 3.15 kA shows that failed IGCT has an extremely low on-state voltage of no more than 1.2 V and is suitable for bypassing the faulty sub-module when a destroyed shoot-through fault occurs.

Integrated gate-commutated thyristor (IGCT) has low loss, low cost and high reliability in the application of modular multilevel converter (MMC). However, due to special turn-off process of IGCT, the commutation transient is very different for IGCT in MMC. This letter reveals a current oscillation phenomenon of MMC based on IGCT and fast recovery diode (FRD). Especially, this oscillation effect become apparent when the FRD with high surge current capability (HS-FRD) is employed in MMC because of high junction capacitance and high stray inductance, which will threaten the safe operation of the system. This letter analyzes current oscillation mechanism and gives the current oscillation modeling. In addition, through detailed tests under various stray inductances, the specific stray inductance range which can cause large current oscillation is obtained and an optimized inductance parameter of IGCT-MMC is proposed. The experiments show that the safe operation area of IGCT in MMC can be guaranteed maximally with the proposed optimized parameter.

The integrity of housing and feature of short circuit is hardly guaranteed for traditional power devices under overvoltage breakdown with following high surge energy. Thus, extra bypass thyristor is needed to achieve stable overvoltage bypass protection for submodules in modular multilevel converters at present. In this article, a novel controlled punch-through IGCT (CP-IGCT) is presented. Based on the punch-through breakdown principle instead of avalanche breakdown principle, the device can achieve breakdown at design voltage with uniformity, thermal stability, and robust package rupture-resilience. As a consequence, no extra sacrificial device is necessary. The fabricated sample proves a stable breakdown at 4000 V and a robust short-circuit feature after energy release of a 18 mF capacitor under 4500 V.

The 6-in gate commutated thyristor (GCT) is suitable for hybrid dc circuit breaker (HDCB) application with its large chip area and high maximum controllable current (MCC), compared with traditional 4-in GCTs. P+ base doping dispersion control is of vital importance in the 6-in GCT chip. Based on the strong correlation between P+ base doping and the gate-cathode breakdown voltage ( $V_{gbr}$ ), P+ base doping dispersion is characterized through $V_{gbr}$ . Test results show that $V_{gbr}$ dispersion in the 6-in GCT sample with etched depth of around 10 μm is about 2 V with the average $V_{gbr}$ of around 22 V. While $V_{gbr}$ dispersion in the sample with etched depth of above 20 μm is above 6 V with the average $V_{gbr}$ of around 27 V. These are consistent with the 2-D simulation results. Then, P+ base doping parameter design is optimized through experiment. Both turn-on and turn-off characteristics of 6-in GCT samples with different P+ base doping parameter designs are compared with HDCB application. The final optimized 6-in GCT chip has no difficulty in turning on under a low dc-link voltage below 100 V and it can turn off 13 kA with the overvoltage of about 4.5 kV successfully, which shows potential in HDCB application.