Recently, new methodologies for manufacturing empty waveguides completely integrated in a planar substrate have been proposed in order to improve the performance of substrate-integrated devices. One of these alternatives is the so-called empty substrate-integrated waveguide (ESIW). The height of high-frequency substrates, where ESIW devices are integrated, is very small. Then, the capacity of storing energy of ESIW resonators is drastically reduced, and as a result, their quality factor is not as high as it could be with a higher ESIW. In order to overcome this restriction, a novel integrated structure is proposed to embed very high-quality factor filters based on the ESIW with an increased height. As a result, we show, in this letter, for the first time, the successful integration of an increased-height ESIW filter in a printed circuit board of 0.305 mm height at Q-band, achieving a quality factor above 1000, which is a remarkable result for a completely substrate-integrated device operating in this frequency band. When compared with the same filter manufactured with an ESIW with the same height as the substrate, the novel filter shows a measured quality factor 85% higher.

Substrate-integrated waveguides (SIWs) are increasingly being used due to their capability of combining the advantages of planar circuits and traditional waveguides. The development of empty SIWs has substantially reduced the related insertion losses, since waves propagate through air instead of propagating through a lossy dielectric medium. Recently, a new empty coaxial structure, completely built with printed circuit boards and integrated in a substrate, has been proposed. It has been named empty substrate-integrated coaxial line (ESICL). The resulting coaxial line has low cost, easy manufacturing, low radiation, low losses, high-quality factor, and nondispersive. A transition from grounded coplanar waveguide to ESICL already exists. In this letter, a transition from microstrip to ESICL is presented for the first time. In order to demonstrate its feasibility, a back-to-back structure and a bandpass filter have been manufactured and measured.

The empty substrate-integrated waveguide (SIW) (ESIW) is an evolution of the SIW. Just as the SIW, the ESIW is of low cost and low profile, and can be integrated into a printed circuit board, but the losses in the ESIW are lower than in those in the SIW thanks to the removal of the dielectric material, which results in ESIW devices with performances close to those implemented with standard rectangular waveguides. In order to increase the operational (monomode) bandwidth of the rectangular waveguides, a metal ridge can be inserted (leading to the ridge waveguide). Extrapolating this idea to the ESIW, in this letter, a study of possible ridge ESIW (RESIW) geometries has been performed, and a novel transition from microstrip line to RESIW is proposed. In order to validate the performance of transition, a back-to-back prototype has been manufactured and measured.

In this paper a novel soldering technique that improves the fabrication process of Empty Substrate Integrated Waveguide (ESIW) devices is presented. Until now, in order to fabricate an ESIW device, the tin solder paste was distributed, before assembling, on the contact surface between layers, in order to ensure a good electrical contact. This process has a low degree of repeatability (random soldering thickness and distribution of tin) and reliability (significant number of non-working prototypes due to tin overflow). In this work, we propose the mechanization of a set of plated vias just next to the metallized walls of the ESIW in the central layer. Next, in the top and bottom covers that close this ESIW, additional plated vias are drilled in the same position, so that, when the device is assembled (using screws or rivets), metallized holes can be seen passing through the whole structure from top to bottom. These holes are then used as soldering vias that can guide the tin paste straight to the point where it is needed. When the paste is dried, soldered vias ensure a very good electrical contact between layers. Besides, the fluid tin fills any small gap that appears between layers, thus providing a very good electrical contact and mechanical union. This novel soldering technique has been validated with experimental results. Several prototypes of filters centered at 13 and 35 GHz have been fabricated, proving the repeatability and reliability of the proposed soldering technique.

Substrate Integrated (SI) technologies, either completely or partially filled with dielectric, as well as completely empty (i.e. without any dielectric material), have been object of intense research in the last years. Their performance in terms of losses, cost and size are mid-way between those of classical planar lines and rectangular waveguides. Many communication devices have already been successfully designed, manufactured and measured in all these SI technologies. But these measurements are mostly done at room temperature under atmospheric pressure conditions. However, the good results (in terms of low loss, profile and cost) of these novel technologies, especially the completely empty versions, close to the performance of the rectangular waveguide, make them a very good alternative for being used in small satellite payloads. Up to now, few attention has been given to the thermal analysis of these SI technologies, still missing a complete comparative study of these effects under both, atmospheric pressure and vacuum conditions. In this work the same filter is implemented on four different SI technologies (including completely and partially filled with dielectric, as well as empty -no dielectric- versions). The four filters are designed, manufactured, and measured at different temperatures according to the thermal testing standards for space applications. The thermal study is performed under atmospheric pressure conditions and, for the first time, under high vacuum conditions. Finally, a comparison with all previous available thermal studies (all of them performed at atmospheric pressure levels) is included.