Joao Pedro

Joao Pedro


Research Focus & Metrics

Academic Career Length

25Years (2002-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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26 July 2012 in IEEE Transactions on Biomedical Circuits and Systems
Verified
Journal Article
Closed access
JCJosé R Custodio
José R Custodio
João GoesJoão Goes
João Goes
NPNuno Paulino
Nuno Paulino
JPJoao Pedro
Joao Pedro
EBErik Bruun
Erik Bruun
This paper describes the design and experimental evaluation of a multibit Sigma-Delta (ΣΔ) modulator (ΣΔM) with enhanced dynamic range (DR) through the use of nonlinear digital-to-analog converters (DACs) in the feedback paths. This nonlinearity imposes a trade-off between DR and distortion, which is well suited to the intended hearing aid application. The modulator proposed here uses a fully-differential self-biased amplifier and a 4-bit quantizer based on fully dynamic comparators employing MOS parametric pre-amplification to improve both energy and area efficiencies. A test chip was fabricated in a 130 nm digital CMOS technology, which includes the proposed modulator with nonlinear DACs and a modulator with conventional linear DACs, for comparison purposes. The measured results show that the ΣΔM using nonlinear DACs achieves an enhancement of the DR around 8.4 dB (to 91.4 dB). Power dissipation and silicon area are about the same for the two cases. The performance achieved is comparable to that of the best reported multibit ΣΔ ADCs, with the advantage of occupying less silicon area (7.5 times lower area when compared with the most energy efficient ΣΔM).

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Journal Article
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Miguel LourençoMiguel Lourenço
Miguel Lourenço
LOLuis Bica Oliveira
Luis Bica Oliveira
JPJoao Pedro
Joao Pedro
André MoraAndré Mora
André Mora
Henrique OliveiraHenrique Oliveira
Henrique Oliveira
RSRui Santos
Rui Santos
Wildfires are expected to increase in number, extent, and severity due to climate change. Hence, it is ever more important to integrate technological developments and scientific knowledge into fire management aiming at protecting lives, infrastructure, and the environment. In this paper, a decision support system (DSS) adapted to the Portuguese context and based on multi-sensor technologies and geographic information system (GIS) functionalities is proposed to leverage operational data, enabling faster and more informed decisions to reduce the impact of wildfires. Here we present a flexible and reconfigurable DSS composed of three components: an ArcGIS online feature service that provides operational data and enables a collaborative environment of users that share operational data in near real-time; a mobile client application to interact with the system, enabling the use of GIS technology and visualization dashboards; and a multi-sensor device that collects field data providing value to external services. The design and validation of this system benefitted from the feedback of wildfire management specialists and a partnership with an end-user in the municipality of Mação that also helped establish the system requirements. The validation results demonstrated that a robust system was achieved with fully interoperable components that fulfill the defined system requirements.

1 January 2016 in Integration
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Journal Article
Closed access
IBI. Bastos
I. Bastos
LOLuis Bica Oliveira
Luis Bica Oliveira
João GoesJoão Goes
João Goes
JPJoao Pedro
Joao Pedro
MSM. Silva
M. Silva

15 April 2019 in Sensors
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Journal Article
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DBDuarte Batista
Duarte Batista
LOLuis Bica Oliveira
Luis Bica Oliveira
NPNuno Paulino
Nuno Paulino
CCCarlos Carvalho
Carlos Carvalho
JPJoao Pedro
Joao Pedro
Pedro Mendonça Dos SantosPedro Mendonça Dos Santos
Pedro Mendonça Dos Santos
This paper describes an energy harvesting system composed of an organic photovoltaic cell (OPV) connected to a DC–DC converter, designed in a 130 nm Complementary Metal-Oxide-Semiconductor (CMOS) technology, with a quasi- maximum power point tracking (MPPT) algorithm to maximize the system efficiency, for indoor applications. OPVs are an emerging technology with potential for low cost indoor light energy harvesting. The OPV current-voltage curves (I-V) under an irradiance of solar simulator Oriel Sol 3A, at room temperature, are obtained and an accurate electrical model is derived. The energy harvesting system is subjected to four different indoor light sources: 35 W halogen, 3.5 W LED, 5 W LED, and 7 W LED, positioned at three different heights (0.45 m, 0.26 m, and 0.11 m), to evaluate the potential of the system for indoor applications. The measurements showed maximum efficiencies of 60% for 35 W halogen and 45% for 7 W LED at the highest distance (0.45 m) and between 60% (5 W LED) and 70% (35 W halogen), at the shorter distance (0.11 m). Under irradiation, the integrated CMOS circuit presented a maximum efficiency of 75.76%, which is, to the best of the authors’ knowledge, the best reported power management unit (PMU) energy system using organic photovoltaic cells.

1 June 2016
Verified
Conference Paper
Closed access
RARicha Arya
Richa Arya
JPJoao Pedro
Joao Pedro
This paper presents a circuit topology for a G m -C biquad filter, suitable for low frequency signals with low amplitude. The low cutoff frequencies are obtained reducing the transconductance G m through a current division technique. Moreover, all the active devices are operating in weak inversion mode lowering the requirements for the level of the voltage power supply. A second and fourth order filter configuration, based on a Tow-Thomas biquad, is designed and simulated. The filter operates in weak inversion with a supply of 0.9V, achieves a cutoff frequency of 52Hz, and power consumption around 2.8μW. The integrated noise is 24.4μV rms , the dynamic range is 43dB, and the filter shows -40dB THD for 5mV input peak amplitude.

26 January 2010 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
JPJoao Pedro
Joao Pedro
João GoesJoão Goes
João Goes
MFM. Figueiredo
M. Figueiredo
ESE. Santin
E. Santin
JFJorge Fernandes
Jorge Fernandes
JFJ. Ferreira
J. Ferreira
This brief presents an 8-bit 120-MS/s time-interleaved pipeline analog-to-digital converter (ADC) fully based on MOS discrete-time parametric amplification. The ADC, fabricated in a 130-nm CMOS logic process, features an active area below 0.12 mm2, where only MOS devices are used. Measurement results for a 20-MHz input signal shows that the ADC achieves 39.7 dB of signal-to-noise ratio, 49.3 dB of spurious-free dynamic range, -47.5 dB of total harmonic distortion, 39.1 dB of signal-to-noise-plus-distortion ratio, and 6.2 bits of peak effective number of bits while consuming less than 14 mW from a 1.2-V supply.