To achieve real-time object detection tasks with high throughput and low latency, this paper proposes a multi-die hardware accelerator architecture. It implements three accelerators on the VU9P chip, each of which is bound to an independent super logic region (SLR). To reduce off-chip memory access and power consumption, this design uses three on-chip buffers to store the weights and intermediate result data on one hand; on the other hand, it minimizes data access and movement and maximizes data reuse. This design uses an 8-bit quantization strategy for both weights and feature maps to achieve twice the throughput and computational efficiency of a single digital signal processor (DSP). In addition, many operators are designed in the accelerator, and all of them are fully parameterized, so it is easy to extend the network, and the control of the accelerator can be realized by configuring the instruction group. By accelerating the YOLOv4-tiny algorithm, the accelerator architecture can achieve a frame rate of 148.14 frames per second (FPS) and a peak throughput of 2.76 tera operations per second (TOPS) at 200 MHz with an energy efficiency ratio of 93.15 GOPS/W. The code can be found at https://github.com/19801201/Verilog_CNN_Accelerator .

This paper put forward an improved stochastic stability condition for Markovian jump systems(MJSs) with interval time-varying delays. Markov jump parameters are modeled as a continuous-time Markov chain. We choose an improved Lyapunov-Krasovskii functional(LKF) and the linear matrix inequality(LMI) formulation, which can improve stability conditions with delay-dependent and more suitable for solving related convex optimization problems. New inequality processing method and the improved Wirtinger-based inequality with integral are used to deal with LKF. The new results are showd by the LMI. At the end of the article, some examples will be given to show that our method is effective and will bring lower conservatism.

Time-varying disturbances not only exist in the external delay of Markovian jump system, but also may exist in the transfer rate of internal probability transfer. This paper put forward an improved interactive convex inequality method for Markovian jump system(MJS) with multi-time-varying disturbances: time-varying delays and time-varying transition rates of probability transfer. On this basis, an improved Lyapunov function is quoted to more approximate the actual system, and the optimization of positive definite conditions of the matrix in Lyapunov functional is discussed, the specific positive definite condition is improved. At the end of the paper, the effectiveness of the above methods is verified by several simulations.

Currently, many applications implement convolutional neural networks on CPUs or GPUs while the performances are limited by the computational complexity of these networks. Compared with the implementation on CPUs or GPUs, deploying convolutional neural accelerators on FPGAs can achieve superior performance. On the other side, the multiplication operations of convolutional neural networks have been a constraint for FPGAs to achieve the better performance. In this paper, we proposed a shift convolutional neural network accelerator, which converts the multiplication operations into shift operations. Based on the shift operation, our accelerator can break the computational bottleneck of FPGAs. On Virtex UltraScale+ VU9P, our accelerator can save DSP resources and reduce memory consumption while achieving a performance of 1.18 TOPS(Tera Operations Per Second), which is an essential improvement over the other convolutional neural accelerators.