Prof. Dr. Myung-Jae Lee
Post-Silicon Semiconductor Institute, Korea Institute of Science and Technology (KIST), Seoul, South Korea
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20Years (2007-Present)
(Calculated once Scilit publication data is synced: current year − year of first publication + 1)
Representative Publications
View All Publications16 April 2018 in IEEE Journal of Selected Topics in Quantum Electronics
Journal Article
Myung-Jae LeeAXAugusto Ronchini Ximenes
Augusto Ronchini Ximenes
PPPreethi Padmanabhan
Preethi PadmanabhanTWTzu-Jui Wang
Tzu-Jui Wang
KHKuo-Chin Huang
Kuo-Chin Huang
Edoardo Charbon +2
We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P + /Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus enabling lower tunneling noise and better timing jitter as well as a higher photon detection efficiency and a wider spectrum. In order to prevent premature edge breakdown, a P-type guard ring is formed at the edge of the junction, and it is optimized to achieve a wider photon-sensitive area. In addition, metal-1 is used as a light reflector to improve the detection efficiency further in backside illumination. With the optimized 3-D stacked 45-nm CMOS technology for back-illuminated image sensors, the proposed SPAD achieves a dark count rate of 55.4 cps/μm 2 and a photon detection probability of 31.8% at 600 nm and over 5% in the 420-920 nm wavelength range. The jitter is 107.7 ps full width at half-maximum with negligible exponential diffusion tail at 2.5 V excess bias voltage at room temperature. To the best of our knowledge, these are the best results ever reported for any back-illuminated 3-D stacked SPAD technologies.
9 April 2007 in Applied Physics Letters
Journal Article
The authors report silicon avalanche photodetectors (APDs) fabricated with 0.18μm standard complementary metal-oxide-semiconductor (CMOS) process without any process modification or a special substrate. When the bias is above the avalanche breakdown voltage, CMOS-compatible APD (CMOS-APD) exhibits negative photoconductance in photocurrent-voltage relationship and rf peaking in the photodetection frequency response. The reflection coefficient measurement of CMOS-APD indicates that rf peaking is due to resonance caused by appearance of inductive components in avalanche region. The rf-peaking frequency increases with the increasing reverse bias voltage.
3 November 2010 in Optics Express
Journal Article
Myung-Jae LeeWCWoo-Young Choi
Woo-Young ChoiWe present a silicon avalanche photodetector (APD) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology without any process modification or special substrates. The CMOS-APD is based on N+/P-well junction, and its current-voltage characteristics, responsivity, avalanche gain, and photodetection frequency response are measured. Gain-bandwidth product over 1 THz is achieved with the CMOS-APD having avalanche gain of 569 and 3-dB photodetection bandwidth of 3.2 GHz.
10 September 2018 in Japanese Journal of Applied Physics
Journal Article
Myung-Jae LeeECEdoardo Charbon
Edoardo Charbon
Single-photon detection and photon counting are useful tools in many fields, from light detection and ranging (LiDAR) to biomedical imaging and from time-resolved Raman spectroscopy to quantum applications. In this context, recently, single-photon avalanche diode (SPAD) sensors in standard CMOS technology have been receiving considerable attention from both scientific and industrial communities since they can provide single-photon detection and photon-counting capabilities along with some functionalities such as time-of-arrival evaluation and histogram processing in a cost-effective manner. In this review, we provide a comprehensive view of the CMOS SPAD technology: from fundamentals to cutting-edge technologies including three-dimensional (3D)-stacked CMOS SPAD sensors.
3 October 2011 in IEEE Journal of Quantum Electronics
Journal Article
JYJin-Sung Youn
Jin-Sung Youn
Myung-Jae LeeKPKang-Yeob Park
Kang-Yeob Park
WCWoo-Young Choi
Woo-Young Choi
We present a 10-Gb/s optoelectronic integrated circuit (OEIC) receiver fabricated with standard 0.13-μm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. The OEIC receiver consists of a CMOS-compatible avalanche photodetector (CMOS-APD), a transimpedance amplifier (TIA), an offset cancellation network, a variable equalizer (EQ), a limiting amplifier (LA), and an output buffer. The CMOS-APD provides high responsivity as well as large photodetection bandwidth. The TIA is composed of two-stage differential amplifiers with high feedback resistance of 4 kΩ. The EQ compensates high-frequency loss by controlling the boosting gain with a capacitor array. The LA consists of five-stage gain cells with active feedback and negative capacitance to achieve broadband performance. With the OEIC receiver, we successfully demonstrate transmission of 10-Gb/s optical data at 850 nm with a bit error rate of 10-12 at the incident optical power of -4 dBm. The OEIC receiver has the core chip area of about 0.26 mm2 and consumes about 66.8 mW.
24 November 2011 in IEEE Electron Device Letters
Journal Article
We investigate the effects of guard-ring (GR) structures on the performance of silicon avalanche photodetectors (APDs) fabricated with the standard complementary metal-oxide-semiconductor (CMOS) technology. Four types of CMOS-compatible APDs (CMOS-APDs) based on the p+/ n-well junction with different GR structures are fabricated, and their electric-field profiles are simulated and analyzed. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth for CMOS-APDs are measured and compared. It is demonstrated that the GR realized with shallow trench isolation provides the best CMOS-APD performance.
About Me
Myung-Jae Lee received the B.S., M.S., and Ph.D. degrees in electrical and electronic engineering from Yonsei University, Seoul, South Korea, in 2006, 2008, and 2013, respectively. His doctoral dissertation concerned silicon avalanche photodetectors (APDs) fabricated with standard CMOS/BiCMOS technology. From 2013 to 2017, he was a Postdoctoral Researcher with Delft University of Technology (TU Delft), The Netherlands, where he worked on single-photon sensors and applications based on single-photon avalanche diodes (SPADs). In 2017, he joined École Polytechnique Fédérale de Lausanne (EPFL), Switzerland, as a Scientist, working on advanced single-photon sensors and applications as well as coordinating and managing several research projects as a Co-Principal Investigator. From 2019 to 2024, he was a Principal Investigator / Principal Research Scientist with Korea Institute of Science and Technology (KIST), South Korea, where he led the research and development of SPAD and SiPM detectors/sensors for LiDAR, biomedical, and quantum applications.
Since 2024, he has been an Associate Professor with Yonsei University, South Korea, where he has been leading the R&Ds of silicon photonics and optical interconnects as well as next-generation SPAD/SiPM/APD detectors/sensors for various applications. He has published 130+ papers in international journals and conferences. He holds 40+ patents and has received 30+ awards/honors.