Victoria Díez-Acereda

Dr. Victoria Díez-Acereda

DIEA, Universidad de Las Palmas de Gran Canaria, Las Palmas de Gran Canaria, Spain
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Research Focus & Metrics

Academic Career Length

8Years (2019-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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19 June 2019 in Electronics
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Journal Article
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VDVictoria Díez-Acereda
Victoria Díez-Acereda
SKSunil Lalchand Khemchandani
Sunil Lalchand Khemchandani
FSFrancisco Javier del Pino Suárez
Francisco Javier del Pino Suárez
SMSergio Mateos-Angulo
Sergio Mateos-Angulo
This paper presents a thorough study of radiation effects on a frequency synthesizer designed in a 0.18 μ m CMOS technology. In CMOS devices, the effect of a high energy particle impact can be modeled by a current pulse connected to the drain of the transistors. The effects of SET (single event transient) and SEU (single event upset) were analyzed connecting current pulses to the drains of all the transistors and analyzing the amplitude variations and phase shifts obtained at the output nodes. Following this procedure, the most sensitive circuits were detected. This paper proposes a combination of radiation hardening-by-design techniques (RHBD) such as resistor–capacitor (RC) filtering or local circuit-redundancy to mitigate the effects of radiation. The proposed modifications make the frequency synthesizer more robust against radiation.

7 June 2023 in Micromachines
Verified
Journal Article
Open access
PDF file
VDVictoria Díez-Acereda
Victoria Díez-Acereda
SKSunil Lalchand Khemchandani
Sunil Lalchand Khemchandani
FSFrancisco Javier del Pino Suárez
Francisco Javier del Pino Suárez
ADAyoze Diaz-Carballo
Ayoze Diaz-Carballo
A comparison between a fully integrated Doherty power amplifier (DPA) and outphasing power amplifier (OPA) for fifth Generation (5G) wireless communications is presented in this paper. Both amplifiers are integrated using pHEMT transistors from the OMMIC’s 100 nm GaN-on-Si technology (D01GH). After a theoretical analysis, the design and layout of both circuits are presented. The DPA uses an asymmetric configuration where the main amplifier is biased in class AB and the auxiliary amplifier is biased in class C, while the OPA uses two amplifiers biased in class B. In the comparative analysis, it has been observed that the OPA presents a better performance in terms of maximum power added efficiency (PAE), while the DPA provides higher linearity and efficiency at 7.5 dB output back-off (OBO). At a 1 dB compression point, the OPA exhibits an output power of 33 dBm with a maximum PAE of 58.3% compared to 44.2% for the DPA for an output power of 35 dBm, and at 7.5 dB OBO, the DPA achieves a PAE of 38.5%, while the OPA achieves 26.1%. The area has been optimized using absorbing adjacent component techniques, resulting in an area of 3.26 mm2 for the DPA and 3.18 mm2 for the OPA.

1 November 2019
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Conference Paper
Closed access
VDVictoria Díez-Acereda
Victoria Díez-Acereda
ADA. Diaz-Carballo
A. Diaz-Carballo
RRR. Rodriguez-Hernandez
R. Rodriguez-Hernandez
JPJ. del Pino
J. del Pino
SKSunil L. Khemchandani
Sunil L. Khemchandani
A Doherty power amplifier (DPA) and a Chireix power amplifier for 5th Generation (5G) wireless applications are presented in this paper. The power amplifiers are integrated in OMMIC 100 nm GaN-on-Si process. In both amplifiers, the λ/4 T-Line are replaced with lumped-elements to reduce its area. The DPA presents a P sat of 34 dBm (>2.5 W), a peak PAE of 41 % and a 9.4 dB gain at 3.6 GHz. At 7 dB output back-off (OBO) it exhibits a 34.2 % PAE. On the other hand, the Chireix outphasing PA provides a P sat of 32 dBm (>1.5 W), a peak PAE of 54.9%, a gain of 10.4 dB and a 25 % PAE at 7 dB OBO. The occupied area of the DPA and Chireix amplifiers are 3.26 mm 2 and 3.2 mm 2 , respectively, including pads.