The quantum-dot cellular automata (QCA) nano-technique has attracted computer scientists due to its noticeable features such as low power consumption and small size. Many papers have been published in the literature about the utilization of this technology for de-signing many QCA circuits and for presenting logic gates in an optimal structure. The T flip-flop, which is an essential part of digital designs, can be used to design synchronous and asynchronous counters. This paper presents a novel T flip-flop structure in an optimal form. The presented novel gate was used to design an N-bit binary synchronous counter. The QCADesigner software was used to verify the designed circuits and to present the simulation results, while the QCAPro tool was used for the power analysis. The proposed design required minimal power and showed good improvements over previous designs.

Quantum-dot Cellular Automata (QCA) is one of the most important computing technologies for the future and will be the alternative candidate for current CMOS technology. QCA is attracting a lot of researchers due to many features such as high speed, small size, and low power consumption. QCA has two main building blocks (majority gate and inverter) used for design any Boolean function. QCA also has an inherent capability that used to design many important gates such as XOR and Multiplexer in optimal form without following any Boolean function. This paper presents a novel design 2:1 QCA-Multiplexer in two forms. The proposed design is very simple, highly efficient and can be used to produce many logical functions. The proposed design output comes from the inherent capabilities of quantum technology. New 4:1 QCA-Multiplexer has been built using the proposed structure. The output waveforms showed the wonderful performance of the proposed design in terms of the number of cells, area, and latency.

Purpose: Quantum-dot cellular automata (QCA) has attracted computer scientists as new emerging nanotechnology for replacement the current CMOS technology because it has unique characteristics such as high frequency, extremely small feature size and low power consumption. The main building blocks in QCA are the majority gate and inverter so any Boolean function can be represented using these gates. Many important circuits were the target for implemented in this technology in an optimal form, such as random-access memory (RAM) cell. QCA-RAM cells were introduced in literature with different forms but most of them are not optimized enough. This paper aims to demonstrate QCA inherent capabilities that can facilitate the design of many important gates such as the XOR gate and multiplexer (MUX) without following any Boolean function to get an optimum design in terms of complexity and delay.Design/methodology/approach: In this paper, a novel structure of QCA-MUX in an optimal form will be used to design two unique structures of a RAM cell. The proposed RAM cells are the lowest cost required compared with different counterparts. The presented RAM cells used a new approach that follows the new suggested block diagram. The presented circuits are simulated and tested with QCADesigner and QCAPro tools.Findings: The comparison of the proposed circuits with the previously reported in the literature show noticeable improvements in speed, area, and the number of cells. The cost function analysis results for the proposed RAM cells show significant improvement compared to older circuits.Originality/value: A novel structure of QCA-MUX in an optimal form will be used to design two unique structures of a RAM cell.