Recent trends in deep learning (DL) have made hardware accelerators essential for various high-performance computing (HPC) applications, including image classification, computer vision, and speech recognition. This survey summarizes and classifies the most recent developments in DL accelerators, focusing on their role in meeting the performance demands of HPC applications. We explore cutting-edge approaches to DL acceleration, covering not only GPU- and TPU-based platforms but also specialized hardware such as FPGA- and ASIC-based accelerators, Neural Processing Units, open hardware RISC-V-based accelerators, and co-processors. This survey also describes accelerators leveraging emerging memory technologies and computing paradigms, including 3D-stacked Processor-In-Memory, non-volatile memories like Resistive RAM and Phase Change Memories used for in-memory computing, as well as Neuromorphic Processing Units, and Multi-Chip Module-based accelerators. Furthermore, we provide insights into emerging quantum-based accelerators and photonics. Finally, this survey categorizes the most influential architectures and technologies from recent years, offering readers a comprehensive perspective on the rapidly evolving field of deep learning acceleration.

As deep learning models scale, they become increasingly competitive from domains spanning from computer vision to natural language processing; however, this happens at the expense of efficiency since they require increasingly more memory and computing power. The power efficiency of the biological brain outperforms any large-scale deep learning (DL) model; thus, neuromorphic computing tries to mimic the brain operations, such as spike-based information processing, to improve the efficiency of DL models. Despite the benefits of the brain, such as efficient information transmission, dense neuronal interconnects, and the co-location of computation and memory, the available biological substrate has severely constrained the evolution of biological brains. Electronic hardware does not have the same constraints; therefore, while modeling spiking neural networks (SNNs) might uncover one piece of the puzzle, the design of efficient hardware backends for SNNs needs further investigation, potentially taking inspiration from the available work done on the artificial neural networks (ANNs) side. As such, when is it wise to look at the brain while designing new hardware, and when should it be ignored? To answer this question, we quantitatively compare the digital hardware acceleration techniques and platforms of ANNs and SNNs. As a result, we provide the following insights: (i) ANNs currently process static data more efficiently, (ii) applications targeting data produced by neuromorphic sensors, such as event-based cameras and silicon cochleas, need more investigation since the behavior of these sensors might naturally fit the SNN paradigm, and (iii) hybrid approaches combining SNNs and ANNs might lead to the best solutions and should be investigated further at the hardware level, accounting for both efficiency and loss optimization.

Accurate indoor person localization is essential for several services, such as assisted living. We introduce a tagless indoor person localization system based on capacitive sensing and localization algorithms that can determine the location with less than 0.2 m average error in a 3 m × 3 m room and has recall and precision better than 70%. We also discuss the effects of various noise types on the measurements and ways to reduce them using filters suitable for on-sensor implementation to lower communication energy consumption. We also compare the performance of several standard localization algorithms in terms of localization error, recall, precision, and accuracy of detection of the movement trajectory.

Indoor localization has many pervasive applications, like energy management, health monitoring, and security. Tagless localization detects directly the human body, like passive infrared sensing, and is the most amenable to different users and use cases. We evaluate the localization and tracking performance, as well as resource and processing requirements of various neural network (NN) types using directly the data from a low resolution 16-pixel thermopile sensor array in a 3 m x 3 m room. Out of the multilayer perceptron, autoregressive, 1D-CNN, and LSTM NN architectures that we test, the latter require more resources but can accurately locate and capture best the person movement dynamics, while the 1D-CNN provides the best compromise between localization accuracy (9.6 cm RMSE) and movement tracking smoothness with the least resources, and seem more suited for embedded applications.

In the rapidly evolving field of autonomous cars, advanced deep learning systems have ushered in a new era of innovation, enabling the integration of unique features into vehicles. These advancements span various areas, including pedestrian and vehicle detection, recognition of road signs and driving patterns, identification of drivable roads and scenes, and improved mapping and routing techniques. However, the high computational requirements of deep learning networks present a significant challenge, especially for embedded systems like FPGAs (Field-Programmable Gate Arrays) that have limited capacity. Addressing this challenge, this article presents a comprehensive survey of the methodologies employed in implementing Convolutional Neural Networks (CNNs) on resource-constrained processors, within the domain of self-driving car applications. Our survey encompasses a thorough review of the existing literature in the field of deep learning applied to autonomous cars, from perception to localization, with a specific emphasis on implementations utilizing embedded hardware such as FPGAs and embedded GPUs. Furthermore, we present and analyze results that elucidate the intricate trade-offs between latency, energy consumption, and the judicious selection of the underlying platform. These insights are crucial for researchers and practitioners in the field, as they provide a clear direction for optimizing the performance of deep learning networks on resource-constrained platforms, ultimately contributing to the advancement of self-driving car technologies.