Increased switching speeds of WBG semiconductors result in a significant magnitude of the displacement currents through power module parasitic capacitances which are inherent in packaging design. This is of increasing concern particularly in case of newly emerging medium voltage SiC MOSFETs since the magnitude of the displacement currents can be several order higher due to the fast switching transients and increased voltage magnitudes of the SiC MOSFETs compared to their Si counter parts. The severity intensifies when the magnitude of the displacement current become comparable to a significant fraction of SiC MOSFETs rated current, leading to the worsened impact on the converter EMI as well as performance in terms of switching losses. The key objective of the paper is to provide a detail insight into the impact of the module parasitic capacitances on the SiC MOSFET switching dynamics and losses. To realize this, a well defined approach to dissect the switching energy dissipation is proposed, based on which the detail analysis and quantitative measurements of the module parasitic capacitance impact in terms of added switching energy losses and common mode currents is investigated using a custom packaged 10 kV half bridge SiC MOSFET power modules. The theoretical analysis and experimental results obtained from dynamic as well as static characterization reveals that the impact of the module parasitic capacitance on the switching energy dissipation is twofold and substantially adverse such that it can not be overlooked considering its intended application in the high power medium voltage power electronic converters.

New packaging solutions and power module structures are required to fully utilize the benefits of emerging commercially available wide bandgap semiconductor devices. Conventional packaging solutions for power levels of a few kW are bulky, meaning important gate driver and measurement circuitry is not properly integrated. This paper presents a fast-switching, integrated power module based on gallium nitride enhancement-mode high-electron-mobility transistors, which is easier to manufacture compared with other hybrid structures. The structure of the proposed power module is presented, and the design of its gate driver circuit and board layout structure is discussed. The thermal characteristics of the designed power module are evaluated using COMSOL Multiphysics. ANSYS Q3D Extractor is used to extract the parasitics of the designed power module, and is included in simulation models of various complexity. The simulation model includes the SPICE model of the gallium nitride devices and parasitics of components are included by experimentally characterizing them up to 2 GHz. Finally, the designed power module is tested experimentally, and its switching characteristics cohere with the results of the simulation model. The experimental results show a maximum achieved switching transient of 64 V/ns and verifies the power loop inductance of 2.65 nH.

Wide band gap semiconductors require packaging with reduced parasitic inductance and capacitance. To achieve this new packaging solutions are proposed which increases integration. This causes difficulty in measurement of voltages, currents and device temperature, and therefore designers must rely more heavily on simulations to gain insight in the operation of the developed prototypes. Additionally, the use of digital design may reduce the number of physical prototype iterations and thereby reduces development time. Gaining fidelity of 3D multi-physics simulations, reduced order modelling and system simulation aids in the design of working prototypes and pushes performance of new power modules based on wide band gap semiconductor devices. This paper provides an overview and discusses the recent advances in the use of finite element analysis and simulation tools within the topic of power module packaging. The main aspects covered are extraction of electrical parasitics, simulation of transient thermal response and issues related to evaluation of electric fields. An example of a simulation software roadmap is presented which enables accurate electro-thermal simulation of new packaging structures that combine conventional power module technology with integrated printed circuit boards. The future challenges for utilizing the potential of digital design are discussed.

This article proposes a general physics-based model for identifying the parasitic capacitance in medium-voltage (MV) filter inductors, which can provide analytical calculations without using empirical equations and is not restricted by the geometrical structures of inductors. The elementary capacitances of the MV inductor are identified, then the equivalent capacitances between the two terminals of the inductor are derived under different voltage potential on the core. Further, a three-terminal equivalent circuit, instead of the conventional two-terminal equivalent circuit, is proposed by using the derived capacitances. Thus, the parasitic equivalent capacitance between the terminals and the core are explicitly quantified. Experimental measurements for parasitic capacitances show a good agreement with the theoretical calculations.

A commercial discrete enhancement mode gallium nitride power component employing advanced package technology without conventional bond wire possesses the ability for bidirectional conduction. The gallium nitride power components can provide not only higher forward conductivity but also superior reverse conductivity. For the most part recent critical debates about the reverse conductivity of a GaN device have tended to center around their performance. However, the reliability of the device under reverse operation should be assessed in order for the advantages to be fully utilized in real applications. We present the results of reverse conduction power cycling test of a discrete 650-volt gallium nitride power device with novel package technology at temperature swings of 100 K. The result shows degradation of thermal conductivity and raising leakage current drain to source as reaching the number of cycles to failure. In physical failure analysis, delamination of a solder joint between a chip and a copper layer of an aluminum print circuit board is observed with a scanning acoustic microscope.

Digital design has been successfully employed in development of new compact wide bandgap power modules, achieving unprecedented switching speeds while maintaining low thermal resistance. Owing to the achieved performance, the next step in the field is ensuring that proposed designs are mechanically robust and reliable. The new power module structures lack the long history of experimental experience as is the case with conventional silicon power modules. To limit the number of physical prototypes that needs to be built and to speed up development time, having a verified simulation model of the thermomechanical behavior is of great value to designers. In this article, a finite element simulation of the thermomechanical induced stress and strain is presented of an integrated GaN full-bridge switching cell. The simulated strain of the power module is verified by an experimental test. During the test, one of the semiconductor devices of the module is subjected to a power loss. A laser displacement sensor is used to measure the in situ deflection of the ceramic substrate caused by the temperature increase. The experimental results confirm the ability of the simulation model to accurately predict the deflection within an error of only 7.3%.