Increased switching speeds of WBG semiconductors result in a significant magnitude of the displacement currents through power module parasitic capacitances which are inherent in packaging design. This is of increasing concern particularly in case of newly emerging medium voltage SiC MOSFETs since the magnitude of the displacement currents can be several order higher due to the fast switching transients and increased voltage magnitudes of the SiC MOSFETs compared to their Si counter parts. The severity intensifies when the magnitude of the displacement current become comparable to a significant fraction of SiC MOSFETs rated current, leading to the worsened impact on the converter EMI as well as performance in terms of switching losses. The key objective of the paper is to provide a detail insight into the impact of the module parasitic capacitances on the SiC MOSFET switching dynamics and losses. To realize this, a well defined approach to dissect the switching energy dissipation is proposed, based on which the detail analysis and quantitative measurements of the module parasitic capacitance impact in terms of added switching energy losses and common mode currents is investigated using a custom packaged 10 kV half bridge SiC MOSFET power modules. The theoretical analysis and experimental results obtained from dynamic as well as static characterization reveals that the impact of the module parasitic capacitance on the switching energy dissipation is twofold and substantially adverse such that it can not be overlooked considering its intended application in the high power medium voltage power electronic converters.
8 June 2018 in IEEE Transactions on Power Electronics
New packaging solutions and power module structures are required to fully utilize the benefits of emerging commercially available wide bandgap semiconductor devices. Conventional packaging solutions for power levels of a few kW are bulky, meaning important gate driver and measurement circuitry is not properly integrated. This paper presents a fast-switching, integrated power module based on gallium nitride enhancement-mode high-electron-mobility transistors, which is easier to manufacture compared with other hybrid structures. The structure of the proposed power module is presented, and the design of its gate driver circuit and board layout structure is discussed. The thermal characteristics of the designed power module are evaluated using COMSOL Multiphysics. ANSYS Q3D Extractor is used to extract the parasitics of the designed power module, and is included in simulation models of various complexity. The simulation model includes the SPICE model of the gallium nitride devices and parasitics of components are included by experimentally characterizing them up to 2 GHz. Finally, the designed power module is tested experimentally, and its switching characteristics cohere with the results of the simulation model. The experimental results show a maximum achieved switching transient of 64 V/ns and verifies the power loop inductance of 2.65 nH.
13 August 2024 in IEEE Transactions on Power Electronics
With the electrification of society and the green transition, the need for efficient high-power electronic converters to support the electricity demand is at an all-time high. A key enabler is the emerging medium voltage (MV) silicon-carbide (SiC) semiconductor devices, which offer improved static and dynamic performance compared to their silicon-counterparts. This article presents a thorough overview of the recent advancements within the MV SiC technology, examining both available semiconductor devices and power modules from industry and academia and directly associates them to their applicability through a comprehensive review of typical high-power electronic applications. At last, the future perspectives on the applicability and commercial widespread of the MV SiC technology are presented.
6 March 2020 in IEEE Transactions on Power Electronics
Wide band gap semiconductors require packaging with reduced parasitic inductance and capacitance. To achieve this new packaging solutions are proposed which increases integration. This causes difficulty in measurement of voltages, currents and device temperature, and therefore designers must rely more heavily on simulations to gain insight in the operation of the developed prototypes. Additionally, the use of digital design may reduce the number of physical prototype iterations and thereby reduces development time. Gaining fidelity of 3D multi-physics simulations, reduced order modelling and system simulation aids in the design of working prototypes and pushes performance of new power modules based on wide band gap semiconductor devices. This paper provides an overview and discusses the recent advances in the use of finite element analysis and simulation tools within the topic of power module packaging. The main aspects covered are extraction of electrical parasitics, simulation of transient thermal response and issues related to evaluation of electric fields. An example of a simulation software roadmap is presented which enables accurate electro-thermal simulation of new packaging structures that combine conventional power module technology with integrated printed circuit boards. The future challenges for utilizing the potential of digital design are discussed.
17 June 2020 in IEEE Transactions on Power Electronics
This article proposes a general physics-based model for identifying the parasitic capacitance in medium-voltage (MV) filter inductors, which can provide analytical calculations without using empirical equations and is not restricted by the geometrical structures of inductors. The elementary capacitances of the MV inductor are identified, then the equivalent capacitances between the two terminals of the inductor are derived under different voltage potential on the core. Further, a three-terminal equivalent circuit, instead of the conventional two-terminal equivalent circuit, is proposed by using the derived capacitances. Thus, the parasitic equivalent capacitance between the terminals and the core are explicitly quantified. Experimental measurements for parasitic capacitances show a good agreement with the theoretical calculations.