In permanent magnet synchronous motor (PMSM) speed control, PI closed-loop control model for current does exist. Although the standard PI closed-loop control has the basic tracking capability from PMSM control system, however, the expected tracking performance is actually difficult to obtain due to the existence of noise. So in this paper, for improvement of the tracking performance, we construct a compensating controller based on EKF without changing the existing PI control loop, and form a closed-loop controller with enhanced performance. Meanwhile, the gain of the compensating control can be obtained by optimizing the entropy of tracking error. Furthermore, in order to reduce computational resources and improve the accuracy of motor state estimation, we adopt the parallel reduced-order extended Kalman filters (EKFs). All of these are implemented on a single field programmable gate array (FPGA) chip and verified through simulations. In addition, we also adopt principles of parallel and pipeline design during control framework design based on an FPGA chip, which improve the execution speed of FPGA-based control algorithm and reduced the logic elements used in the chip. Finally, experiments were carried out on a PMSM-based FPGA platform, which verified the feasibility and effectiveness of the proposed PMSM control.
1 April 2021 in IEEE Transactions on Industrial Electronics
This article presents a fault-tolerant control method combined with a novel power balancing approach based on model predictive control for a three-phase cascaded H-bridge inverter. The fault-tolerant control uses redundant voltage vectors and combination voltages to redistribute the output voltage under switch open-fault and short-fault conditions. To overcome the output power imbalance problem of the conventional fault-tolerant control strategy, inter- and inner-phase power balancing approaches are proposed based on novel reward functions. The effects of H-bridge cell faults on the inverter are analyzed in detail, followed by the operational principles of the proposed power balancing and fault-tolerant control methods. Hardware-based experimental results validate the effectiveness of the proposed strategy.
8 May 2023 in International Journal of Circuit Theory and Applications