The prevalence of anxiety among university students is increasing, resulting in the negative impact on their academic and social (behavioral and emotional) development. In order for students to have competitive academic performance, the cognitive function should be strengthened by detecting and handling anxiety. Over a period of 6 weeks, this study examined how to detect anxiety and how Mano Shakti Yoga (MSY) helps reduce anxiety. Relying on cardiac signals, this study follows an integrated detection-estimation-reduction framework for anxiety using the Intelligent Internet of Medical Things (IIoMT) and MSY. IIoMT is the integration of Internet of Medical Things (wearable smart belt) and machine learning algorithms (Decision Tree (DT), Random Forest (RF), and AdaBoost (AB)). Sixty-six eligible students were selected as experiencing anxiety detected based on the results of self-rating anxiety scale (SAS) questionnaire and a smart belt. Then, the students were divided randomly into two groups: experimental and control. The experimental group followed an MSY intervention for one hour twice a week, while the control group followed their own daily routine. Machine learning algorithms are used to analyze the data obtained from the smart belt. MSY is an alternative improvement for the immune system that helps reduce anxiety. All the results illustrate that the experimental group reduced anxiety with a significant (p < 0.05) difference in group × time interaction compared to the control group. The intelligent techniques achieved maximum accuracy of 80% on using RF algorithm. Thus, students can practice MSY and concentrate on their objectives by improving their intelligence, attention, and memory.

Logic-level estimators of leakage currents, in nanoscale standard-cell-based designs, are relevant for the dramatic speed advantage with respect to analog SPICE-level simulation. We propose a novel logic-level leakage estimation model based on the characterization of voltages at the internal nodes of digital cells, in conjunction with the characterization of leakage currents in a single field-effect transistor (FET) device and with the input-dependent Kirchhoff current law expression of the total current in the cell topology. The voltage-based nature of the approach simplifies the inclusion of supply voltage variation/scaling impact, as well as of output voltage drop (loading effect), on leakage currents. The method has been implemented in hardware description language models of a complete cell library. Exhaustive tests report average accuracy below 1% error in 22-nm CMOS and 20-nm FinFET technologies, when compared with SPICE BSIM simulation results.

In this paper, a highly stable all CMOS current reference against temperature and supply variation is proposed. Current reference of 5μA and 50nA has been designed for low power and ultra-low power applications respectively. The reference architecture is based on ratio between the PTAT voltage and the PTAT resistance. The process insensitive temperature compensation is accomplished by dividing TC of voltage with process insensitive TC of resistor. A high PSRR, process independent voltage reference is designed for PTAT voltage. N-poly on chip resistor is used for PTAT resistance. The proposed current reference is implemented in 0.18-μm TSMC technology. The architecture achieved PSRR of 74dB and line sensitivity of 0.05% works at supply voltage variation from 1.4V to 3.6V. The current reference of 5μA and 50nA attain temperature coefficient of 11.6 ppm/°C and 12.2 ppm/°C respectively for the temperature variation of -55° C to 125° C.