This paper presents the design and the implementation of input/output (I/O) interface circuits for Gb/s-per-pin operation, fully compatible with low-voltage differential signaling (LVDS) standard. Due to the differential transmission technique and the low voltage swing, LVDS allows high transmission speeds and low power consumption at the same time. In the proposed transmitter, the required tolerance on the dc output levels was achieved over process, temperature, and supply voltage variations with neither external components nor trimming procedures, by means of a closed-loop control circuit and an internal voltage reference. The proposed receiver implements a dual-gain-stage folded-cascode architecture which allows a 1.2-Gb/s transmission speed with the minimum common-mode and differential voltage at the input. The circuits were implemented in a 3.3-V 0.35-/spl mu/m CMOS technology in a couple of test chips. Transmission operations up to 1.2 Gb/s with random data patterns and up to 2 Gb/s in asynchronous mode were demonstrated. The transmitter and receiver pad cells exhibit a power consumption of 43 and 33 mW, respectively.

The design of bandgap-based voltage references in digital CMOS raises several design difficulties, as the supply voltage is lower than the silicon bandgap in electron volts, i.e., 1.2 V. A current-mode architecture is used in order to address the main issues posed by the low supply, but the implementation of the operational amplifier and of dedicated startup circuits deserves some attention. Even if nonstandard devices such as depletion-mode MOS transistors may be helpful to manage the supply scaling, they are seldom available and poorly characterized. Therefore, they must be avoided in a robust design featuring a high portability. This paper proposes some circuit solutions suitable for very low-supply-voltage operation and addresses the main issues of achieving the correct bias point at the power on. A few bandgap references were implemented in digital 0.35- and 0.18-/spl mu/m technologies featuring a nominal output voltage of about 500 mV and minimum supplies from 1.5 to 0.9 V.

The measurement of the analyte concentration in electrochemical biosensors traditionally requires costly laboratory equipment to obtain accurate results. Innovative portable solutions have recently proposed, but usually they lean on PC or smartphones for data elaboration and they exhibit poor resolution or portability and proprietary software. This paper presents a low-cost portable system, assembling an ad-hoc designed analog front-end and a development board equipped with a system-on-chip integrating a microcontroller and a Wi-Fi network processor. The wireless module enables the transmission of measurements directly to a cloud service for sharing device outcome with users (physicians, caregivers, etc.). In doing so, the system does not require customized software nor other devices involved in data acquisition. Further, when any internet connection is lost, the data are stored on board for subsequent transmission when a Wi-Fi connection is available. The noise output voltage spectrum has been characterized. Since the designed device is intended to be battery-powered to enhance portability, investigations about battery lifetime were carried out. Finally, data acquired with a conventional benchtop Autolab PGSTAT-204 electrochemical workstation are compared with the outcome of our developed device to validate the effectiveness of our proposal. To this end, we selected ferri/ferrocyanide as redox probe, obtaining the calibration curves for both platforms. The final outcomes are shown to be feasible, accurate and repeatable.

This paper presents a switched-capacitor Sigma-Delta modulator designed in 90-nm CMOS technology, operating at 1.2-V supply voltage. The modulator targets healthcare and medical diagnostic applications where the readout of small-bandwidth signals is required. The design of the proposed A/D converter was optimized to achieve the minimum power consumption and area. A remarkable performance improvement is obtained through the integration of a low-noise amplifier with modified Miller compensation and rail-to-rail output stage. The manuscript also presents a set of design equations, from the small-signal analysis of the amplifier, for an easy design of the modulator in different technology nodes. The Sigma-Delta converter achieves a measured 96-dB dynamic range, over a 250-Hz signal bandwidth, with an oversampling ratio of 500. The power consumption is 30 μW, with a silicon area of 0.39 mm².

The paper discusses the design of a power generation circuit suitable to provide the supply voltage for a passive UHF RFID tag. The proposed differential rectifier exhibits a low activation threshold and is compatible with digital CMOS technologies. The chip supply voltage is obtained through a Dickson-based voltage multiplier and an ultra low-power voltage regulator