Electric-double-layer (EDL) gated transistors use ions in an electrolyte to induce charge in the channel of the transistor by field-effect. Because a sub-nanometer gap capacitor is created at the electrolyte/channel interface, large capacitance densities (∼µF cm⁻²) corresponding to high sheet carrier densities (10¹⁴ cm⁻²) can be induced, exceeding conventional gate dielectrics by about one order of magnitude. Because it is an interfacial technique, EDL gating is especially effective on two-dimensional (2D) crystals, which—at the monolayer limit—are basically interfaces themselves. Both solid polymer electrolytes and ionic liquids are routinely used as ion-conducting gate dielectrics, and they have provided access to regimes of transport in 2D materials that would be inaccessible otherwise. The technique, now widely used, has enabled the 2D crystal community to study superconductivity, spin- and valleytronics, investigate electrical and structural phase transitions, and create abrupt p-n junctions to generate tunneling, among others. In addition to using EDL gating as a tool to investigate properties of the 2D crystals, more recent efforts have emerged to engineer the electrolyte to add new functionality and device features, such as synaptic plasticity, bistability and non-volatility. Example of potential applications include neuromorphic computing and non-volatile memory. This review focuses on using ions for electrostatic control of 2D crystal transistors both to uncover basic properties of 2D crystals, and also to add new device functionalities.

Low-temperature synthesis of two-dimensional (2D) transition metal dichalcogenides (TMDs) is a key challenge for their integration with complementary metal-oxide-semiconductor (CMOS) technology at ‘back-end-of-line (BEOL)’. Most low-temperature synthesis utilizes alkali salts, oxide-based metals, and methyl-group based chalcogen precursors which do not meet current BEOL requirements for contaminant-free manufacturing and process scalability. In this study, we benchmark a carbon and alkali salt-free synthesis of fully coalesced, stoichiometric 2D WSe ₂ films on amorphous SiO ₂ /Si substrates at BEOL- compatible temperatures (475 °C) via gas-source metal-organic chemical deposition. This work highlights the necessity of a Se-rich environment in a kinetically limited growth regime for successful integration of low-temperature 2D WSe ₂ . Atomic-scale characterization reveals that BEOL WSe ₂ is polycrystalline with domain size of ~200 nm and band gap of 1.8 eV. Back-gated and electrolyte double layer gated field-effect transistors (FETs) exhibit increased ON currents as high as 4 µ A µ m ⁻¹ and ON/OFF ratios of ~10 ⁶ , demonstrating a 100× improvement compared to previously reported BEOL compatible TMDs.