This article investigates a class of linear-nonlinear switching active disturbance rejection control (ADRC) to design speed controllers and current controllers for permanent magnet synchronous machine (PMSM) in servo systems, which aims at enhancing the ability of disturbance rejection of speed and current controllers for PMSM. First, the mathematical model of PMSM is introduced. Next, the design of a class of linear-nonlinear switching ADRCs is introduced in details. Then, the stability of linear-nonlinear switching extended state observers (ESOs) is proved by multiple Lyapunov functions. Lastly, the effectiveness of the speed and current controllers based on the linear-nonlinear active disturbance rejection technique is validated by experiments results of a 5.5-kW PMSM platform. Specially, the experiment results of the speed controllers illustrate that the amplitude of speed change of the proposed ADRCs is smaller than that of the linear ADRC (LADRC) when the step load torque disturbance occurs. The proposed ADRCs can overcome the overshoot of speed response caused by improper parameter setting of LADRC. The experiment results of the current controllers show that the proposed LNSADRC type 2 has greater robustness than the other ADRC controllers when b ₀₂ is not estimated accurately.

It is well known that proportional-integral-derivative (PID) controllers are dominant in industrial scenarios. PID with high-order derivative or integral terms named generalized PID is superior to the PID. However, there is little literature investigating how to tune the parameters of the generalized PID to enhance the disturbance rejection ability. Toward that end, this article illustrates that the cascade controllers based on the first-order linear active disturbance rejection controllers (LADRCs) (cascade LADRCs) and high-order LADRCs can be interpreted as the generalized PID with low-pass filters for speed servo systems and position servo systems, which in turn is an alternative method to realize the generalized PID. Moreover, the differences between the high-order LADRC and cascade LADRCs are the generalized integral terms, which can be quantified by integral time multiplied absolute error. The proposed LADRC controllers are verified and compared with the current controllers by simulations in MATLAB/Simulink. Finally, one experimental example of the LADRC controllers is implemented on the position servo dc motor system platform.

This article investigates a modified linear–nonlinear switching active disturbance rejection control (LNSADRC) voltage controller which is suitable for the permanent magnetic synchronous generator (PMSG) high-speed operation in electrified aircraft scenarios. The improved LNSADRC voltage controller integrates the power approach law of sliding mode into the extended state observer (ESO), which is more robust compared with the linear active disturbance rejection control (LADRC). Then, the stability of the proposed LNSADRC voltage controller is proved by constructing multiple Lyapunov functions. Finally, the effectiveness of the proposed voltage controller is validated by the experiment results of the 5.5-kW PMSG platform. The experimental results illustrate that the voltage recovery time of the LNSADRC voltage controller is smaller than the LADRC voltage controller when the PMSG faces load resistor change and prime mover speed change, and the time of voltage establishment for the LNSADRC is faster than the LADRC.

It is well-known that a phase-locked loop (PLL) technique is widely used in engineering scenarios, recovering and synthesizing the phase and frequency values. The loop filter is the core part of the PLL. This article proposes a class of nonlinear active disturbance rejection loop filters for the PLL. First, we present the detailed nonlinear mathematical model of PLL in consideration of the phase unbalancing, the voltage harmonics, and the voltage offset. Next, based on the model, a class of nonlinear active disturbance rejection loop filters with different nonlinearity degree-of-freedom are proposed in the synchronous reference frame, which can make the PLL in possession of better performance in comparison with that of PLL designed by traditional methods. Moreover, the parameter tuning rules of the nonlinear loop filters are given. Furthermore, hardware-in-the-loop experiments are finished in the dSPACE platform so as to check the real-time performance of the loop filters in more electronic aircraft power grid system scenario. At last, we conclude that the loop filter with the nonlinear generalized integrator extended state observer type2 possesses the best performance among the three loop filters for PLL in this article.

In electric vehicle systems, bi-directional DC/DC converters are used to interface the battery bank with the high voltage DC bus of the inverter. The high power density and high efficiency are required for bidirectional DC/DC converters. This paper discusses the relationship between switching frequency, inductor value and passive components volume. First, the topologies of the system and the converter are presented. Then, the loss breakdown model is provided. A selection for the switching frequency is presented and an option of inductor value is provided to reduce the converter size and to keep the converter efficient. Then the converter layout which further enhances the power density is discussed. Finally, a high power density and high efficiency converter prototype is built, and the efficiency and thermal performance evaluation of the converter at different operating conditions is given.

In this article, a linear switched active disturbance rejection controller (LSADRC) is proposed for the speed and voltage control of the permanent magnet starter/generator (PMS/G). Different from the existing works, a type of linear switched extended state observer (LSESO) is newly introduced. The observer gains of the LSESO are not fixed anymore but adaptively changed with the value of the system state. First, the relationships are analyzed between the observer bandwidth and the control performance. Then, the whole working process is divided into three regions by the value of the system state and the switching regulations are designed. Furthermore, the stability conditions are derived for the switched error system with an ensured ${\mathcal {L}}_{2}$ gain. Finally, the effectiveness of the proposed method is verified in the 5.5-kW PMS/G platform. The results illustrate the LSADRC can both achieve the smoothness of the control signal and robustness of the PMS/G system.