Po-Tsang Huang

Prof. Po-Tsang Huang


Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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27 March 2020 in IEEE Network
Verified
Journal Article
Closed access
KFKai-Ten Feng
Kai-Ten Feng
Li-Hsiang ShenLi-Hsiang Shen
Li-Hsiang Shen
CLChi-Yu Li
Chi-Yu Li
PHPo-Tsang Huang
Po-Tsang Huang
SWSau-Hsuan Wu
Sau-Hsuan Wu
MCMau-Chung Frank Chang
Mau-Chung Frank Chang
Millimeter wave (mmWave) technology achieving multi-gigabits speed plays a significant role in beyond 5G and the next 6G wireless communication networks thanks to its huge spectrum utilization and beam-based directional transmissions. To tackle temporary ultra-high data demands of hotspot areas, three-dimensional (3D) heterogeneous network (HetNet) is designed with the integration of mmWave unmanned aerial vehicles (UAV) to provide resilient instantaneous control and data transmissions. However, some critical beam-related issues for mmWave implementation of UAVs/drones are addressed including robust initial beam alignment, mobility-aware beam tracking and beam refinement. In this research, we aim at developing robust and efficient beam control mechanisms by implementing a prototype of 3D flying heterogeneous communications. The backhaul connections operate at mmWave frequency between airship and UAV/drone, while fronthaul links adopt lower frequency bands such as Wi-Fi for multiuser data transmissions. We evaluate system performances for our proposed beam control schemes and provide a real-time prototype of 3D on-demand flying mobile communication for mmWave HetNets.

12 July 2022 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
PPParthasarathi Pal
Parthasarathi Pal
KLKe-Jing Lee
Ke-Jing Lee
STSunanda Thunder
Sunanda Thunder
SDSourav De
Sourav De
PHPo-Tsang Huang
Po-Tsang Huang
YWYeong-Her Wang
Yeong-Her Wang
This work reports 2-bits/cell hafnium oxide-based stacked resistive random access memory devices fabricated on flexible polyimide substrates for neuromorphic applications considering the high thermal budget. The ratio of low-resistance state current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) to high-resistance state current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ) or ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ for the fabricated devices was above $1.4\times10$ 3 with a low device-to-device variation at $100 \boldsymbol {\mu }\text{A}$ current compliance. The mechanical stability over 10 4 bending cycles at a 5 mm bending radius and endurance over 10 6 WRITE cycles makes these devices suitable for online neural network training. The data retention capability over 10 4 s at 125°C also infuses these devices’ long-term inference capability. Furthermore, the performance of the devices has been verified for neuromorphic applications by system-level simulations with experimentally calibrated data. The system-level simulation reveals only a 2% loss in inference accuracy over ten years from the baseline.

28 June 2023 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
YHYuan-Yu Huang
Yuan-Yu Huang
PHPo-Tsang Huang
Po-Tsang Huang
PLPo-Yi Lee
Po-Yi Lee
PSPin Su
Pin Su
Ferroelectric-field-effect transistors (FeFETs) are promising for future nonvolatile-memory and computation-in-memory applications. This brief presents a new approach for logic-in-memory by using complementary FeFET (CFeFET). We demonstrate that the CFeFET can serve as a 2-to-1 multiplexer (MUX) with the ferroelectric polarization state acting as the selector. Furthermore, the CFeFET-based MUX can be exploited as a reconfigurable and nonvolatile multifunction logic gate. We demonstrate our approach and the logic functionality of reconfigurable AND/OR/XOR through calibrated SPICE simulation. This study may provide insights and facilitate future beyond-von-Neumann data-centric computing with advanced FeFET technologies.

1 May 2017
Verified
Conference Paper
Closed access
CCChia-Ning Chang
Chia-Ning Chang
YCYin-Nien Chen
Yin-Nien Chen
PHPo-Tsang Huang
Po-Tsang Huang
PSPin Su
Pin Su
CCChing-Te Chuang
Ching-Te Chuang
This paper investigates and evaluates analog and digital low-dropout linear voltage regulators (LDO) with FinFET, TFET and hybrid TFET-FinFET implementations. We utilize Sentaurus physics-based atomistic 3D TCAD mixed-mode simulations for device characteristics and HSPICE with look-up tables based on Verilog-A models calibrated with TCAD simulation results. Frequency response, load regulation and power supply rejection ratio (PSRR) are evaluated for analog LDOs under low, medium and high bias-current conditions. The results indicate that for analog implementations, TFET-LDO and hybrid-LDO provide better loop-gain and PSRR than FinFET-LDO under low and medium operating currents, whereas at higher operating current, FinFET implementation would outperform. As operating voltage is reduced, the performances of analog implementations degrade, and digital implementations become favorable for VIN below around 0.55V. We further show that for digital LDO, all FinFET implementation provides superior performance over all TFET and hybrid TFET-FinFET implementations.

4 March 2022 in Physical Communication
Verified
Journal Article
Closed access
ABAmit Sravan Bora
Amit Sravan Bora
TSTourangbam Harishore Singh
Tourangbam Harishore Singh
PHPo-Tsang Huang
Po-Tsang Huang

5 January 2015 in IEEE Transactions on Biomedical Circuits and Systems
Verified
Journal Article
Closed access
PHPo-Tsang Huang
Po-Tsang Huang
SWShang-Lin Wu
Shang-Lin Wu
YHYu-Chieh Huang
Yu-Chieh Huang
LCLei-Chun Chou
Lei-Chun Chou
THTeng-Chieh Huang
Teng-Chieh Huang
HTHo-Ming Tong
Ho-Ming Tong
Heterogeneously integrated and miniaturized neural sensing microsystems are crucial for brain function investigation. In this paper, a 2.5D heterogeneously integrated bio-sensing microsystem with μ-probes and embedded through-silicon-via (TSVs) is presented for high-density neural sensing applications. This microsystem is composed of μ-probes with embedded TSVs, 4 dies and a silicon interposer. For capturing 16-channel neural signals, a 24 × 24 μ-probe array with embedded TSVs is fabricated on a 5×5 mm 2 chip and bonded on the back side of the interposer. Thus, each channel contains 6 × 6 μ-probes with embedded TSVs. Additionally, the 4 dies are bonded on the front side of the interposer and designed for biopotential acquisition, feature extraction and classification via low-power analog front-end (AFE) circuits, area-power-efficient analog-to-digital converters (ADCs), configurable discrete wavelet transforms (DWTs), filters, and a MCU. An on-interposer bus (μ-SPI) is designed for transferring data on the interposer. Finally, the successful in-vivo test demonstrated the proposed 2.5D heterogeneously integrated bio-sensing microsystem. The overall power of this microsystem is only 676.3 μW for 16-channel neural sensing.