Vehicular Communication Networks (VCNs) are essential to intelligent transportation systems, where real-time data exchange between vehicles and infrastructure supports safety, efficiency, and automation. However, achieving high Quality of Service (QoS)—especially under delay-sensitive conditions—remains a major challenge due to the high mobility and dynamic topology of vehicular environments. While some efforts have explored routing protocol optimization, few have systematically compared multiple optimization approaches tailored to distinct traffic and delay conditions. This study addresses this gap by evaluating and enhancing two widely used routing protocols, QOS-AODV and GPSR, through their improved versions, CM-QOS-AODV and CM-GPSR. Two distinct optimization models are proposed: the Traffic-Oriented Model (TOM), designed to handle variable and high-traffic conditions, and the Delay-Efficient Model (DEM), focused on reducing latency for time-critical scenarios. Performance was evaluated using key QoS metrics: throughput (rate of successful data delivery), packet delivery ratio (PDR) (percentage of successfully delivered packets), and end-to-end delay (latency between sender and receiver). Simulation results reveal that TOM-optimized protocols achieve up to 10% higher PDR, maintain throughput above 0.40 Mbps, and reduce delay to as low as 0.01 s, making them suitable for applications such as collision avoidance and emergency alerts. DEM-based variants offer balanced, moderate improvements, making them better suited for general-purpose VCN applications. These findings underscore the importance of traffic- and delay-aware protocol design in developing robust, QoS-compliant vehicular communication systems.

Cellular networks have changed our life. However, current cellular network does not have an efficient bandwidth management during congestion. Some of these techniques was used have a few drawbacks such as the performance of the handoff mechanism depends on the channel quality, QoS, bandwidth, delay and speed of the cellular node, the handoff optimizing tend to increase the ping-pong handoff rate, frequency and bandwidth. The paper indicates the promising factors of the handoff mechanisms as decrease delay, enhance speed, saving energy and control bandwidth to achieve better throughput in wireless networks as compared to predecessor networks. How limited bandwidth are segregated among nodes is discussed in details in this paper. We believe that having implemented the proposed enhanced bandwidth management, congestion in current cellular network can perform better.

When a system completes processing a number of functions in a given amount of time, the condition that drives it to do so is called a real-time system. The processing platforms of projective missile system face two major problems: structure complexity and high cost. The complexity in the system structure is a result for multi reasons such as the mechanism used within the system to perform the system functionality and this can cause delay in the data processing which occurs because of various factors, including the architecture of the processing unit, the way the signals in the system modules are synchronized, and the computational power of the unit. In order to reduce the system complexity as well as the system cost, we proposed in this paper applying the spatial parallelism mechanism and a concurrent structure over our embedded system. We used the FPGA platform (NEEK board) to be the implementation environment for this system which resulted in enriching our proposed system with core features such as the low cost as well as decreasing the system complexity since the concurrent structure is used within this system. The spatial parallelism can provide the ability for duplicating the tasks which can be processed via specific modules. We covered in this system signals ranging from 1 Hz to 200 MHz. To avoid the limitation of the master clock of the Nios II Embedded Evaluation Kit, we manipulate the Phase Locked Loop to enable the system from covering wide spectrum of signals. Our laser projective frequency jamming system has the ability to process multiple frequencies per time. The implementation has achieved acceptable throughput and lower complexity (small size (2604)) logic elements in terms of FPGA resource usage and high operating frequency (200 MHz). In addition, the structural design methodology also allows scalability of the embedded concurrent computing architecture as the entire system grows.