Charge-trapping defects in $\text{Pt}/{\text{Al}}_2{\text{O}}_3/{\text{In}}_{0.53}{\text{Ga}}_{0.47}\text{As}$ metal-oxide-semiconductor capacitors and their passivation by hydrogen are investigated in samples with abrupt oxide/III-V interfaces. Tunneling of electrons into defect states (border traps) in the atomic layer deposited ${\text{Al}}_2{\text{O}}_3$ near the oxide/semiconductor interface is found to control the frequency dispersion of the capacitance in accumulation. Hydrogen anneals effectively passivate border traps in the oxide, in addition to some of the midgap states that control carrier generation in the channel. This is evident in the reduced frequency dispersion in accumulation, reduced capacitance-voltage stretch-out through depletion, and suppression of the inversion carrier response in capacitance-voltage measurements.

We report on the effects on water oxidation performance of varying (1) the nanoscale TiO₂ thickness and (2) the catalyst material in catalyst/TiO₂/SiO₂/Si anodes. Uniform films of atomic layer deposited TiO₂ are prepared in the thickness range ∼1–12 nm on degenerately-doped p⁺-Si, yielding water oxidation overpotentials at 1 mA cm⁻² of 300 mV to 600 mV in aqueous solution (pH 0 to 14). Electron/hole transport through Schottky tunnel junction structures of varying TiO₂ thickness was studied using the reversible redox couple ferri/ferrocyanide. The dependence of the water oxidation overpotential on ALD-TiO₂ thickness, with all other anode design features unchanged, exhibits a linear trend corresponding to ∼21 mV of added overpotential at 1 mA cm⁻² per nanometer of TiO₂ for TiO₂ thicknesses greater than ∼2 nm. For thinner TiO₂ layers, an approximately thickness-independent overpotential is observed. The linear behavior for anodes with thicker TiO₂ layers is consistent with the predicted effect of bulk TiO₂-limited electronic conduction on the voltage required to sustain the current density across the TiO₂/SiO₂ insulator stack. Eight different oxygen evolution catalysts of thickness 1–3 nm are studied. For the anodes investigated, 3 nm of Ir or Ru gave the best water oxidation performance, but both thinner layers and other catalysts can be quite effective, suggesting the potential for reduced materials cost. Lastly, a flat band voltage analysis of solid state thin film capacitors was done for five different gate metals on n-Si to probe junction energetics directly relevant to a photoanode. The results are consistent with a Schottky junction in which the Fermi level at the semiconductor surface is unpinned.

Renewable fuel generation is essential for a low carbon footprint economy. Thus, over the last five decades, a significant effort has been dedicated towards increasing the performance of solar fuels generating devices. Specifically, the solar to hydrogen efficiency of photoelectrochemical cells has progressed steadily towards its fundamental limit, and the faradaic efficiency towards valuable products in CO₂ reduction systems has increased dramatically. However, there are still numerous scientific and engineering challenges that must be overcame in order to turn solar fuels into a viable technology. At the electrode and device level, the conversion efficiency, stability and products selectivity must be increased significantly. Meanwhile, these performance metrics must be maintained when scaling up devices and systems while maintaining an acceptable cost and carbon footprint. This roadmap surveys different aspects of this endeavor: system benchmarking, device scaling, various approaches for photoelectrodes design, materials discovery, and catalysis. Each of the sections in the roadmap focuses on a single topic, discussing the state of the art, the key challenges and advancements required to meet them. The roadmap can be used as a guide for researchers and funding agencies highlighting the most pressing needs of the field.

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

III-V semiconductor field effect transistors require an insulator/channel interface with a low density of electrically active defects and a minimal interface dipole to avoid Fermi level pinning. We demonstrate that an atomically abrupt and unpinned interface can be formed between an ${\text{In}}_{0.53}{\text{Ga}}_{0.47}\text{As}$ (100) channel and an ${\text{Al}}_2{\text{O}}_3$ dielectric layer grown by atomic layer deposition (ALD) when oxidation of the substrate surface is prevented before and during oxide deposition. X-ray photoelectron spectra and electron microscopy indicate that in situ desorption of a protective ${\text{As}}_2$ layer on the ${\text{In}}_{0.53}{\text{Ga}}_{0.47}\text{As}$ $\left(100\right)-4\times 2$ surface followed by ALD of ${\text{Al}}_2{\text{O}}_3$ produced an atomically abrupt interface without Fermi level pinning. Temperature-dependent and frequency-dependent capacitance-voltage and conductance-voltage analysis of the resulting $\text{Pt}/{\text{Al}}_2{\text{O}}_3/\text{InGaAs}$ capacitors are consistent with movement of the Fermi level through the InGaAs band gap. Moreover, the nearly ideal flat band voltages observed for gate metals of widely varying work function indicate a small oxide/semiconductor interface dipole. Density functional theory calculations of the electronic structure of an ideal amorphous ${\text{Al}}_2{\text{O}}_3/\text{InGaAs}$ (100) interface predict a weak perturbation of the InGaAs electronic structure if its oxidation is avoided, consistent with experiment.