Kefei Liu

Kefei Liu

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Kefei Liu

Key Laboratory of Microelectronic Devices and Circuits, MPW Center, School of Integrated Circuits, Peking University, Beijing, China

Research Focus & Metrics

Academic Career Length

6Years (2021-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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18 January 2021 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
YKYisong Kuang
Yisong Kuang
XCXiaoxin Cui
Xiaoxin Cui
YZYi Zhong
Yi Zhong
KLKefei Liu
Kefei Liu
CZChenglong Zou
Chenglong Zou
RHRu Huang
Ru Huang
Generally, computer-science-oriented artificial neural networks (ANNs) and neuroscience-oriented spiking neural networks (SNNs) are two main approaches to develop brain-spired non von Neumann computing systems. The goal of exploring complex artificial intelligence (AI) systems demands general neuromorphic hardware platforms compatible with both of them. However, as a result of the obvious differences in their fundamental mathematical expression and coding scheme, many neuromorphic platforms or deep neural network (DNN) accelerators accommodate only one of them. This brief presents a reconfigurable scalable neuromorphic chip based on digital leaky integrate-and-fire (LIF) neuron model targeting low-cost large-scale systems. By unifying ANN and SNN paradigms within a LIF neuron framework with point-to-point (P2P) communication, the chip can accommodate most popular neural networks. The chip adopts distributed on-chip memory architecture with a capacity of 64K neurons and 64M synapses. It achieves a peak throughput of 12.29 GSOP/s at 1.2 V, 192MHz and peak energy efficiency of 2.64 pJ/SOP at 890 mV, 24MHz. The results of implementations of a spike-based spatio-temporal memory model and ternary-weight event-based convolutional neural networks (CNNs) demonstrate outstanding compatibility of the chip.

30 July 2024 in IEEE Journal of Solid-State Circuits
Verified
Journal Article
Closed access
YZYi Zhong
Yi Zhong
YKYisong Kuang
Yisong Kuang
KLKefei Liu
Kefei Liu
ZWZilin Wang
Zilin Wang
SFShuo Feng
Shuo Feng
YWYuan Wang
Yuan Wang
The neuromorphic approach of fulfilling brain-like edge intelligence is confronted with three paramount challenges: 1) ever-increasing application demands versus insufficient on-chip resources; 2) diverse data sources and models versus heterogeneous computing paradigms; and 3) adaptation to real scenarios versus absence of on-chip learning. To bridge those gaps in the current research community, this article presents PAICORE, a 537.98-mm $^{2}$ digital neuromorphic processor with a unified computing and learning paradigm. PAICORE is a scalable 1024-core design, integrating over 1.919 million neurons and 4.773 billion synapses on a single chip. PAICORE is implemented in globally asynchronous locally synchronous (GALS) style with a five-level fat up–down quadtree as dedicated network-on-chip (NoC) infrastructure and tiled 2-D chip array as inter-chip architecture. The distributed processing cores fuse the hybrid spiking neural network (SNN), artificial neural network (ANN), and on-chip spike-timing-dependent plasticity (STDP) learning models into a unified description by modular-level reconfiguration. PAICORE achieves the peak performance of 20.74 TSOPS, 41.49 TOPS, and 115.25 GSOPS, with the best energy efficiency of 5.181 TSOPS/W, 10.372 TOPS/W, and 1.222 TSOPS/W for SNN, ANN, and on-chip learning paradigms, respectively. Benefiting from the PAIFLOW software framework, PAICORE hardware platform can be equivalently simulated and efficiently programmed in a large-scale deployment, in accordance with specific optimizing demands for its target multi-paradigm tasks.

18 July 2021
Verified
Conference Paper
Closed access
KXKanglin Xiao
Kanglin Xiao
XCXiaoxin Cui
Xiaoxin Cui
KLKefei Liu
Kefei Liu
XCXiaole Cui
Xiaole Cui
XWXin’an Wang
Xin’an Wang
Event-based dynamic vision sensors (DVS), inspired by biological vision systems, lead to new sensing and computing paradigms. The novel sensors output the sensed signal alone with many noise events asynchronously. Data-preprocessing for filtering these noises is significant before utilizing the data in applications such as classification, tracking and motion-data extraction. This paper describes a fully spike-based and neuromorphic-hardware-implementable neural network with a signal-oriented self-adaptive filtering time window for filtering the noise events robustly in the data captured by DVS. In particular, the simple leaky integrate-and-fire (LIF) neuron model is adopted as the basic elements of the network out of the purpose of hardware-friendly. Experiments based on both synthesized data and authentically-captured data are designed for quantitative comparison with traditional DVS noise filters to verify the outperformance of the proposed filter. The main contribution of this work is that the proposed spiking neural network (SNN) based filter achieves higher signal-noise-ratio (SNR) compared to traditional noise filters and performances more robust in the tolerance for changing signals.

14 October 2022 in Microelectronics Journal
Verified
Journal Article
Closed access
CZChenglong Zou
Chenglong Zou
XCXiaoxin Cui
Xiaoxin Cui
GCGuang Chen
Guang Chen
SFShuo Feng
Shuo Feng
KLKefei Liu
Kefei Liu
YWYuan Wang
Yuan Wang

19 September 2023 in IEEE Transactions on Cognitive and Developmental Systems
Verified
Journal Article
Closed access
KLKefei Liu
Kefei Liu
JSJingjie Shang
Jingjie Shang
XCXiaoxin Cui
Xiaoxin Cui
CZChenglong Zou
Chenglong Zou
YKYisong Kuang
Yisong Kuang
YWYuan Wang
Yuan Wang
Real-time visual perception is essential for animals to survive in a complicated natural environment and for robots to interact with moving targets. However, delays generally occur during the signal transfer and processing both for animals and robots, and these delays would produce errors during real-time interactions with the physical world. Natural facts have shown that animals can perfectly compensate for these pervasive delays. In this paper, we propose a novel and effective position perception model (PPM) based on spiking neural networks (SNNs) to address this ambivalent situation in robotic vision systems. We investigate the performance of PPM by tracking a moving target. PPM can compensate for temporal delays in the system regardless of the target’s speed. We also present a deep version of PPM (dPPM). dPPM can handle some more complex situations and make long-term anticipations. We finally implement PPM on neuromorphic chips and test it on real DVS (dynamic vision sensor) data, and it can perform real-time or anticipative visual perceptions.

9 December 2022 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
KLKefei Liu
Kefei Liu
XCXiaoxin Cui
Xiaoxin Cui
XJXiang Ji
Xiang Ji
YKYisong Kuang
Yisong Kuang
CZChenglong Zou
Chenglong Zou
YWYuan Wang
Yuan Wang
Real-time target tracking is a usual task for humans despite the neural delays during the nervous system’s axonal transfer and neural processing. A plausible explanation is that the human brain employs predictive mechanisms to compensate for the delay. Inspired by the brain, this paper adopts a prediction network based on spiking neural networks (SNNs) to implement a real-time tracking task on a neuromorphic chip with low power consumption. The SNN-based prediction network outperforms the long short-term memory (LSTM) network on a small dataset and reduces 90% to 98% computations compared with LSTM. The quantized SNN-based network is deployed on a neuromorphic chip, and it takes 25ms and only 442 626nJ for a single prediction. The tracking performance of the system is also verified in real-life scenarios. Furthermore, the proposed real-time target tracking system can be easily ported to other neuromorphic platforms.