Giovanni Stea is a full professor at the Department of Information Engineering of the University of Pisa, Italy. He received a Laurea degree and a PhD degree in Computer Systems Engineering from the University of Pisa, Italy, in 1999 and 2003, respectively. His current research interests include Quality of Service and resource allocation in networks, performance evaluation through simulation and analytical techniques, and multiaccess edge computing. In these fields, he has coauthored more than 140 peer-reviewed papers and 17 patents. He has been involved in European research projects, and he has led joint research projects with industrial partners. He is currently leading the FoReLab national project (MUR Departments of Excellence grant 2023–2027), focused on enabling technologies for Industry 5.0. He has served as a member of technical and/or organization committees for more than 100 international conferences, including SIGCOMM. He is a fellow of the European Alliance for Innovation.