Shaik Qadeer

Prof. Shaik Qadeer

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Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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1 September 2014
Verified
Conference Paper
Closed access
Shaik QadeerShaik Qadeer
Shaik Qadeer
MKMohammed Zafar Ali Khan
Mohammed Zafar Ali Khan
SSSyed Abdul Sattar
Syed Abdul Sattar
AHAhmed
Ahmed
The efficient computation of Discrete Fourier Transform (DFT) is an important issue as it is used in almost all fields of engineering for signal processing. This paper presents a different form of Radix-2 Fast Fourier Transform (FFT) based on Decimation in time (DIT) to compute DFT, discuss their implementation issues and derive it's signal to quantization noise ratio(SQNR) that further decreases the number of multiplication counts without affecting the number of additions of Radix-2 discrete Fourier Transform. It is achieved by simple scaling of Twiddle factor (TF) using a special scaling factor. This modification not only decreases the total flop counts from 5Nlog 2 N to ≈ 42/3 Nlog 2 N (6.66% fewer than the standard Radix-2 FFT algorithm) but also improves SQNR from 1 over 2N2 -2b to 9 over 15N2 -2b (1.6dB more than the standard Radix-2 FFT algorithm).

1 December 2018
Verified
Conference Paper
Closed access
HSHarsha Keerthan Samudrala
Harsha Keerthan Samudrala
Shaik QadeerShaik Qadeer
Shaik Qadeer
SASyed Azeemuddin
Syed Azeemuddin
ZKZafar Khan
Zafar Khan
In this paper we discuss the VLSI implementation of the new radix-2 Decimation In Time (DIT) Fast Fourier Transform (FFT) algorithm with reduced arithmetic complexity which is based on scaling the twiddle factor. Some signal processing require high performance FFT processors and to meet these performance requirements, the processor needs to be pipelined and parallelized. An optimized ASIC design is derived from this new radix-2 algorithm with fewer multipliers and adopted a complete parallel and pipelined architecture for hardware implementation of a 64 point FFT. The implementation results show that the proposed architecture significantly reduces the hardware area by 13.74 percent and power consumption by 16 percent when compared to the standard FFT architecture. Simulation of design units is done in Xilinx ISE WebPack 13.1 and synthesized using Cadence Encounter RTL Compiler.

1 December 2016
Verified
Conference Paper
Closed access
MKMohammed Zafar Ali Khan
Mohammed Zafar Ali Khan
Shaik QadeerShaik Qadeer
Shaik Qadeer
Rader abd Brenner's ‘real-factor’ FFT can be applied to Radix-4 FFT to fetch saving in the multiplication counts. However in turn the number of addition count increases which results in increase in total flop count. For this in this paper two levels of saving ideas are proposed. First is a slight modification to Rader and Brenner's ‘real-factor’ FFT for Radix-4, which not only reduces the multiplication but also makes the total flop count equals to standard Radix-4 FFT. Second is to apply the scaling operation to the Twidlle Factors(TF) similar to Tangent FFT like one proposed by Frigo for split radix so that the net computational complexity is of the order of 4Nlog2N computation, where N is the size of FFT. As such the complexity order is same as Standard Split Radix FFT.

4 September 2018 in Microsystem Technologies
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Journal Article
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Shaik QadeerShaik Qadeer
Shaik Qadeer
MKMohammed Yousuf Khan
Mohammed Yousuf Khan
NSN Shylashree
N Shylashree
VNVijay Nath
Vijay Nath

20 November 2006 in IEEE Signal Processing Letters
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Journal Article
Closed access
MKM. Zafar Ali Khan
M. Zafar Ali Khan
Shaik QadeerShaik Qadeer
Shaik Qadeer
A comb spectrum evaluation problem arises in the channel estimation of pilot symbol-assisted modulation (PSAM) systems and also in the (de)modulation of multichannel communication system based on orthogonal frequency division multiplexing (OFDM). In this letter, we decompose an M-component comb spectrum evaluation with transform length N into 1) a fast Fourier transform evaluation of transform length M of a length M vector, 2) which in turn is obtained from the lengthN input vector (by folding and scaling). This decomposition allows for the application of split-radix and radix-4 algorithms for evaluation of M length transform and efficient computation of the length M vector from the length N input vector, which is classically termed as "pruning." When N=2p, the comb spectrum computation requires only N/8+M/3log2 M nontrivial complex multiplications, if N/Mges8. In addition, conditions under which comb spectrum evaluation can be done in O(MlogM) complex multiplies are identified

10 October 2023 in Journal of The Institution of Engineers (India): Series B
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Journal Article
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Shaik QadeerShaik Qadeer
Shaik Qadeer
HKHarsha Keerthan
Harsha Keerthan
ASAzeemuddin Syed
Azeemuddin Syed
MKMohammed Khan
Mohammed Khan