A design strategy for the synthesis of high-selectivity/low-order analog filters in Complementary Metal-Oxide-Semiconductor (CMOS) technology for very high frequency (VHF) applications is presented. The methodology for the reconstitution of a given transfer function by means of Signal Flow Graphs (SFG) manipulation in canonical form is proposed leading to a fully differential $gm$ -C biquad filter. As a practical example, the design of a notch filter intended to suppress interferers in the lower sideband (400 MHz) of the Medical Implant Communication Service (MICS), in single-poly, 6-metal layers; Mixed-Signal/RF 0.18 µm CMOS technology is realized. To compare the performance of the proposal with some other solution, the design of a 7th order elliptic notch filter based on Frequency Dependent Negative Resistors (FDNRs) was also accomplished. The attained simulation results prove that the proposal is competitive compared to the FDNR solution and some other state-of-the-art filters reported in the literature. The most salient features of the proposed notch biquad include: the selectivity, whose value is comparable to that of a 7th order elliptic approach and some other 3rd order filters; a high-frequency operation without resonators; linearity, with a +15 dBm $II{P}_3$ ; a reduced form factor with a total occupied area of 0.004282 mm² and mostly a low design complexity.

This study rigorously investigates the effectiveness of nonlinear filters in CMOS for 2-D signal processing to enhance image quality. We comprehensively compare traditional linear filters’ performance, which operate on the principle of linearity, with nonlinear filters, such as the median-median (Med-Med) approach, designed to handle nonlinear data. To ensure the validity of our findings, we use widely accepted metrics like normalized squared error (NSE), peak signal-to-noise ratio (PSNR), and structural similarity index (SSIM) to quantify the differences. Our simulations and experiments, conducted under controlled conditions, demonstrate that nonlinear filters in CMOS outperform linear filters in removing impulse noise and enhancing images. We also address the challenges of implementing these algorithms at the hardware level, focusing on power consumption and chip area optimization. Additionally, we propose a new architecture for the Med-Med filter and validate its functionality through experiments using a 9-pixel image sensor array. Our findings highlight the potential of nonlinear filters in CMOS for real-time image quality enhancement and their applicability in various real-world imaging applications. This research contributes to visual technology by combining theoretical insights with practical implementations, paving the way for more efficient and adaptable imaging systems.