This paper deals with the study and analysis of several rational approximations to approach the behavior of arbitrary-order differentiators and integrators in the frequency domain. From the Riemann–Liouville, Grünwald–Letnikov and Caputo basic definitions of arbitrary-order calculus until the reviewed approximation methods, each of them is coded in a Maple 18 environment and their behaviors are compared. For each approximation method, an application example is explained in detail. The advantages and disadvantages of each approximation method are discussed. Afterwards, two model order reduction methods are applied to each rational approximation and assist a posteriori during the synthesis process using analog electronic design or reconfigurable hardware. Examples for each reduction method are discussed, showing the drawbacks and benefits. To wrap up, this survey is very useful for beginners to get started quickly and learn arbitrary-order calculus and then to select and tune the best approximation method for a specific application in the frequency domain. Once the approximation method is selected and the rational transfer function is generated, the order can be reduced by applying a model order reduction method, with the target of facilitating the electronic synthesis.

A design strategy for the synthesis of high-selectivity/low-order analog filters in Complementary Metal-Oxide-Semiconductor (CMOS) technology for very high frequency (VHF) applications is presented. The methodology for the reconstitution of a given transfer function by means of Signal Flow Graphs (SFG) manipulation in canonical form is proposed leading to a fully differential $gm$ -C biquad filter. As a practical example, the design of a notch filter intended to suppress interferers in the lower sideband (400 MHz) of the Medical Implant Communication Service (MICS), in single-poly, 6-metal layers; Mixed-Signal/RF 0.18 µm CMOS technology is realized. To compare the performance of the proposal with some other solution, the design of a 7th order elliptic notch filter based on Frequency Dependent Negative Resistors (FDNRs) was also accomplished. The attained simulation results prove that the proposal is competitive compared to the FDNR solution and some other state-of-the-art filters reported in the literature. The most salient features of the proposed notch biquad include: the selectivity, whose value is comparable to that of a 7th order elliptic approach and some other 3rd order filters; a high-frequency operation without resonators; linearity, with a +15 dBm $II{P}_3$ ; a reduced form factor with a total occupied area of 0.004282 mm² and mostly a low design complexity.

In this paper, the photoluminescence (PL) of hydrogenated amorphous silicon carbide (a-Si_1−xC_x:H) thin films obtained by Plasma Enhancement Chemical Vapor Deposition (PECVD) is reported. Strong PL is obtained after a fast annealing process for 60 s at temperatures of 200, 400, 600, and 800 °C. The thin films are characterized using Fourier Transform Infrared spectroscopy (FTIR), PL spectroscopy, and Energy-Dispersive X-ray Spectroscopy (EDS). According to the results of the structural characterization, it is deduced that a structural rearrangement of the amorphous matrix is carried out during the fast annealing process, which results in different degrees of oxidation on the a-Si_1−xC_x:H films. The PL peak position shifts towards higher energies as the temperature increases. The sample deposited with a silane/methane flux ratio of 37.5 at an Radio Frequency (RF) power of 6 W experiences an increase in PL intensity of more than nine times, with a displacement in the peak position from 2.5 eV to 2.87 eV, at 800 °C. From the PL analysis, we observe two emission bands: one centered in the near infrared and other in the visible range (with a blue peak). This study opens the possibility to use such thin films in the development of optoelectronics devices, with potential for application in solar cells.

This paper focuses on using piecewise linear (PWL) functions to generate continuous-discrete chaotic neural networks. Specifically, we examine a multi-scroll Hopfield neural network (HNN) composed of four neurons and incorporate a PWL memristor as a synapse in the second neuron. It means that we also utilize a PWL function as an activation function to replace the typical hyperbolic tangent function, a second PWL function to mimic a sine function, which controls the internal state of the memristor, and finally, a third PWL function to set the number of scrolls on the chaotic attractor. To investigate the mechanisms behind chaos generation, the dynamic behaviors of the proposed continuous-discrete Hopfield neural network are analyzed using equilibrium points, time series analysis, bifurcation diagrams, and Lyapunov exponents. Next, we demonstrate that the chaotic attractor of the proposed PWL HNN can be experimentally observed by field-programmable gate array (FPGA) technology using an optimized design that does not require multipliers. As a result of the optimized FPGA design, the proposed approach enables a straightforward physical implementation of PWL HNNs with less hardware utilization and a relatively high throughput compared to CORDIC– and DSP–based designs, which may enhance data processing capabilities

This paper presents the design, simulation, and experimental verification of the fractional‐order multiscroll Lü chaotic system. We base them on op‐amp‐based approximations of fractional‐order integrators and saturated series of nonlinear functions. The integrators are first‐order active realizations tuned to reduce the inaccuracy of the frequency response. By an exponential curve fitting, we got a convenient design equation for realizing fractional‐order integrators of orders from 0.1 to 0.95. The results include simulations in SPICE of the mathematical description and the electronic implementation and experimental measurements that confirm them. Monte Carlo and sensitivity tests revealed a robust realization. Contrary to its passive counterparts, the suggested realizations significantly reduce design and implementation efforts by favoring resistors and capacitors with commercial values and reducing hardware requirements.