Active gate drivers (AGDs) are popular because of their capability to flexibly control the switching behavior of power transistors. State-of-the-art AGDs need to adopt extensive driving switches, resistors, or additional voltage or current sources, which significantly increase the cost, size, and complexity of gate drivers. To overcome this bottleneck, an enhanced inductor-based current-source gate driver (ECSGD) with well-controlled gate driving current and fast driving current transition is proposed in this letter. Driving current is controlled by switching between different resonant networks within a presettled hysteresis window to solve the poor gate driving current regulation limitation of conventional inductor-based current-source gate drivers. Driving current transition speed is also accelerated by the internal supply voltage boosting function. The design prototype demonstrates a driving current control of 2 A with a hysteresis window of 0.3 A. The driving current transition time is shortened by more than 30% with positive driving voltage boosted from 15 to 25 V. Hence, the ECSGD can be used as an AGD with a simple structure, high control accuracy, and fast response speed.

Resonant gate driver (RGD) is a premium solution for driving power transistors in high frequency and high power density applications, with the merits of much less power loss and more design freedoms in adjusting driving time. This paper aims at providing a thorough review of RGDs and guidelines for constructing the most suitable RGDs under different design specifications. The classification of RGDs based on resonance characteristics is firstly proposed. It results in more straight forward, precise RGD categories without complex hierarchy and cross coincidences. The dynamic energy distributions in the switching transients of each type of RGDs are deeply investigated and energy utilization rates are concluded and compared. The key parameters affecting driving energy and driving time for each type of RGDs are further explored, as the resonant inductor, gate resistor and initial inductor current. A top-down design approach is also summarized to guide the optimized RGD designs under different converter requirements.

To realize accurate current control for a boost converter, a precise measurement of the inductor current is required to achieve high resolution current regulating. Current sensors are widely used to measure the inductor current. However, the current sensors and their processing circuits significantly contribute extra hardware cost, delay and noise to the system. They can also harm the system reliability. Therefore, current sensorless control techniques can bring cost effective and reliable solutions for various boost converter applications. According to the derived accurate model, which contains a number of parasitics, the boost converter is a nonlinear system. An Extended Kalman Filter (EKF) is proposed for inductor current estimation and output voltage filtering. With this approach, the system can have the same advantages as sensored current control mode. To implement EKF, the load value is necessary. However, the load may vary from time to time. This can lead to errors of current estimation and filtered output voltage. To solve this issue, a load variation elimination effect elimination (LVEE) module is added. In addition, a predictive average current controller is used to regulate the current. Compared with conventional voltage controlled system, the transient response is greatly improved since it only takes two switching cycles for the current to reach its reference. Finally, experimental results are presented to verify the stable operation and output tracking capability for large-signal transients of the proposed algorithm.

This article reveals parasitics-induced current distortion (PCD) effect in discontinuous conduction mode boost power factor (PF) correction (PFC) converter. With consideration of parasitics, accurate inductor current is derived through total differential functions of line voltage, output voltage and duty cycle. Furthermore, the proposed current model is used to analyze PFC converter under conventional sensorless average current mode (SACM) control, which is achieved by a variable duty cycle. It is found that parasitics have considerable influence to the input current, and PCD leads to a degraded PF. In order to solve this issue, a current reshaping strategy is proposed to reduce the PCD phenomenon. Based on the damped current equations, a compensation gain is derived to reshape the input current, which reduces the current damping and distortion caused by parasitics. Both the PCD phenomenon and the current reshaping strategy are verified by simulations and experiments.

In motor drives, distortions of phase voltages and currents are often caused by nonlinear effects of inverters such as dead time, turn-on delay, turn-off delay and voltage drop of power devices. To eliminate these distortions, the dead-time compensation voltage is usually investigated. Furthermore, the relationship between the dead-time compensation voltage and phase currents is nonlinear, which is related to not only the parameters mentioned above, but also the snubber and parasitic capacitance of inverters. A nonlinear function is constructed to model the nonlinear relationship in this paper. To identify the nonlinear function, a method based on artificial neural networks is proposed without inverter parameters. According to the criterion that the trajectory of voltage vector in $\alpha - \beta $ coordinate system is a circle, an adaptive law is constructed to modify the parameters of the nonlinear function. Therefore, the nonlinear dead-time compensation voltage model is obtained accurately, where the distortions of voltages and currents are reduced without any additional hardware. Applying this method to the current predictive control, the bandwidth of a current loop is increased by 500Hz. Effectiveness of the method is verified by experiments.

This article presents an optimal duty ratio assisted pulse frequency modulation control for very high frequency isolated class E dc–dc converter to achieve both continuous power flow and optimal switch timing. The continuous power flow significantly reduces output ripple of the converter, while the optimal switch timing guarantees consistent zero-voltage-switching (ZVS) and minimized reverse conduction loss. To pave the way for the proposed control, a resonant fitting model is established for deriving the optimal duty ratio and output power under dynamic switching frequency. The optimal duty ratio is calculated according to zero-crossing points of the switching node voltage ( v_ds ), and it aims to turn on the power switch once v_ds reaches zero. This ensures consistent ZVS while preventing reverse conduction of gallium nitride (GaN) high electron mobility transistor (HEMT) when the switching frequency changes. Furthermore, the proposed control is integrated with on/off modulation to extend load range of the converter. A 10–18 MHz prototype is built to verify effectiveness of the proposed control. Compared with conventional PFM control, the proposed control reduces the power loss by 35.9% at 40% load while maintains continuous power flow.