A self-testable and highly reliable low noise amplifier designed in 0.13 m CMOS technology is presented in this paper. This reliable LNA could be used to design the front-end of critical nodes in wireless local area networks to ensure data transmission. The LNA test, based on a built-in self test methodology, monitors its behavior. The test circuit is composed of one sensor and one biasing voltage sensor, and it offers high fault coverage. The high reliability is ensured by the use of redundancies. The LNA works under a 0.9 V supply voltage and the test chip has RF characteristics suitable for 802.11b/g applications. Parametric faults are injected and detected to demonstrate the efficiency of the BIST circuitry. Thanks to the switching on redundant blocks, performances are maintained and hence this proves the reliability of the methodology proposed.

This work presents and analyses the design of a multi-mode Low Noise Amplifier (LNA) dedicated to 2.4GHz Wireless Sensor Network (WSN) applications. The proposed inductorless LNA, implemented in a 28nm FDSOI CMOS technology, is based on a common-gate configuration imbedded with a common-source stage to boost the overall transconductance of the circuit. The LNA is specifically designed, and optimized, to address three modes of operation. The reconfiguration is performed through current tuning, combined with switching the back gate of the amplification transistors. The proposed implementation allows the figure of merit (FOM) to be maintained constant in the different modes of operation. In the low power mode, the LNA only consumes 350uW. It achieves a voltage gain (Gv) of 16.8dB and a noise figure (NF) of 6.6dB. In the medium performance mode, the gain and the NF are respectively improved to 19.4dB and 5.4dB, the power consumption is 0.9mW. In the high-performance mode, the gain is maximum, 22.9dB, and the noise figure is minimum, 3.6dB, for a power consumption of 2mW. The linearity represented by the input referred third-order intercept point (IIP3) is constant, close to -16dBm. The reported LNA occupies only 0.0015mm2.

The Internet of Things (IoT) entails new challenges for the development of wireless transceivers. Radio-frequency building blocks require complex design flows in order to address very different sets of specifications. This paper presents a three-step design methodology dedicated to the synthesis of RF building blocks. Based on the inversion coefficient, the proposed design methodology allows the optimization of the circuit performance for any CMOS process and any application. It is illustrated through the implementation of inductorless low-noise amplifiers (LNA) in three different CMOS nodes: 28-nm fully-depleted silicon-on-insulator (FDSOI), and 65 and 130-nm Bulk. These LNAs are dedicated to two cases of IoT applications: multi-standard and ultra low power. The proposed circuits achieve the state-of-the-art performance for all nodes and applications. Furthermore, the methodology enables an insightful comparison of the capabilities of the different CMOS nodes in terms of power consumption, noise, and bandwidth.

A millimeter-wave (mmW) chipset for 77-81 GHz automotive radar has been developed in 0.13μm SiGe HBT technology. This work presents the performances of an integrated Low Noise Amplifier (LNA), a Power Amplifier (PA), a down-converting Mixer, and also a Voltage Controlled Oscillator (VCO). For successful implementation of the circuit, considerations on the reliability of the design have been taken into account. Measurements on all circuits confirm the feasibility of mmW front-end using silicon based technologies for W-band application.

This work proposes a novel demodulation circuit to address the implementation of Wake-Up Receivers (Wu-Rx) in Wireless Sensor Nodes (WSN). This RF demodulator, namely Modulated Oscillator for envelOpe Detection (MOOD), is compatible with both FSK and OOK/ASK modulation schemes. The system embeds an LC oscillator, an envelope detector and a base-band amplifier. To optimize the trade-off between RF performances and power consumption, the cross-coupled based oscillator is biased in moderate inversion region. The proof of concept is implemented in a 65 nm CMOS technology and is intended for the 2.4 GHz ISM band. With a supply voltage of 0.5 V, the demodulator consumes 120 μW and demonstrates the demodulation of OOK and FSK at a data rate of 500 kbps.

The widespread deployment of the Internet of Things (IoT) requires the development of new embedded systems, which will provide a diverse array of different intelligent functionalities. However, these devices must also meet environmental, maintenance, and longevity constraints, while maintaining extremely low-power consumption. In this work, a batteryless, low-power consumption, compact embedded system for IoT applications is presented. This system is capable of using a combination of hybrid solar and radiofrequency power sources and operates in the 900MHz ISM band. It is capable of receiving OOK or ASK modulated data and measuring environmental data and can transmit information back to the requester using GFSK modulated data. The total consumption of the system during its sleep state is 920nW. Minimum power required to operate is 15.1dBm or 70 lux, when using only radiofrequency or solar powering, respectively. The system is fully designed with components off the shelf (COTS).