We report a low current collapse GaN-based high electron mobility transistor (HEMT) with an excellent thermal stability at 150 °C. The AlN was grown by N2-based plasma enhanced atomic layer deposition (PEALD) and shown a refractive index of 1.94 at 633 nm of wavelength. Prior to deposit AlN on III-nitrides, the H2/NH3 plasma pre-treatment led to remove the native gallium oxide. The X-ray photoelectron spectroscopy (XPS) spectroscopy confirmed that the native oxide can be effectively decomposed by hydrogen plasma. Following the in situ ALD-AlN passivation, the surface traps can be eliminated and corresponding to a 22.1% of current collapse with quiescent drain bias (V DSQ) at 40 V. Furthermore, the high temperature measurement exhibited a shift-free threshold voltage (V th), corresponding to a 40.2% of current collapse at 150 °C. The thermal stable HEMT enabled a breakdown voltage (BV) to 687 V at high temperature, promising a good thermal reliability under high power operation.

Non-radiative energy transfer (NRET) from quantum dots (QDs) to monolayer MoS₂ has been shown to greatly enhance the photoresponsivity of the MoS₂ photodetector, lifting the limitations imposed by monolayer absorption thickness. Studies were often performed on a photodetector with a channel length of only a few μm and an active area of a few μm². Here, we demonstrate a QD sensitized monolayer MoS₂ photodetector with a large channel length of 40 μm and an active area of 0.13 mm². The QD sensitizing coating greatly enhances photoresponsivity by 14-fold at 1.3 μW illumination power, as compared with a plain monolayer MoS₂ photodetector without QD coating. The photoresponsivity enhancement increases as QD coating density increases. However, QD coating also causes dark current to increase due to charge doping from QD on MoS₂. At low QD density, the increase of photocurrent is much larger than the increase of dark current, resulting in a significant enhancement of the signal on/off ratio. As QD density increases, the increase of photocurrent becomes slower than the increase of dark current. As a result, photoresponsivity increases, but the on/off ratio decreases. This inverse dependence on QD density is an important factor to consider in the QD sensitized photodetector design.

In this paper, we fabricated Gallium Nitride (GaN) vertical p-i-n diodes grown on free-standing GaN (FS-GaN) substrates. This homogeneous epitaxy led to thicker GaN epi-layers grown on the FS-GaN substrate, but a high crystalline quality was maintained. The vertical GaN p-i-n diode showed a low specific on-resistance of 0.85 mΩ-cm² and high breakdown voltage (BV) of 2.98 kV. The high breakdown voltage can be attributed to the thick GaN epi-layer and corresponds to the mesa structure. Improvement of the device characteristics by the mesa structure was investigated using device simulations. We proved that a deeper mesa depth is able to decrease the electric field at the bottom of the mesa structure. Furthermore, a smaller mesa bevel angle will assist the BV up to 2.98 kV at a 60° bevel angle. Our approach demonstrates structural optimization of GaN vertical p-i-n diodes is useful to improve the device performance.

In this paper, we report a 1.84 kV GaN-on-GaN Schottky barrier diode (SBD) corresponds to a low on-resistance of $1.98 {\text{m}\Omega-\text{cm}^{2}$ . The GaN epi-layer was etched as the multi-fins-structure with optimized bevel angle. The fins structure enable to improve the breakdown voltage by means of the uniformed electric field distribution. Afterwards, the GaN fins were capped by atomic layer deposition (ALD)-grown AlN film. The AlN served as a tunneling-barrier layer, which not only passivated thee GaN surface but also improved the turn-on voltage. The AlN-capped SBD shows a turn-on voltage at 0.18 V. Furthermore, the temperature-dependent transfer characteristics suggest the different current tunneling mechanisms at low and high electric field conditions, respectively. The time-dependent dielectric breakdown (TDDB) measurement suggests the surface traps were well passivated by ALD-AlN, which implies that the AlN cap-layer enables to improve the device reliability.

In this study, we report a low ohmic contact resistance process on a 650 V E-mode p-GaN gate HEMT structure. An amorphous silicon (a-Si) assisted layer was inserted in between the ohmic contact and GaN. The fabricated device exhibits a lower contact resistance of about 0.6 Ω-mm after annealing at 550 °C. In addition, the threshold voltage shifting of the device was reduced from −0.85 V to −0.74 V after applying a high gate bias stress at 150 °C for 10⁻² s. The measured time to failure (TTF) of the device shows that a low thermal budget process can improve the device’s reliability. A 100-fold improvement in HTGB TTF was clearly demonstrated. The study shows a viable method for CMOS-compatible GaN power device fabrication.