Kuei-Shu Chang-Liao

Kuei-Shu Chang-Liao


Research Focus & Metrics

Academic Career Length

24Years (2003-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

View All Publications
29 February 2024 in ACS Applied Materials & Interfaces
Verified
Journal Article
Open access
WCWei-Ming Chen
Wei-Ming Chen
HHHsin-Yu Hsieh
Hsin-Yu Hsieh
DWDong-Ze Wu
Dong-Ze Wu
HTHorng-Yi Tang
Horng-Yi Tang
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
MWMaw-Kuen Wu
Maw-Kuen Wu
Surface modification is a highly effective strategy for addressing issues in lithium-rich layered oxide (LLO) cathodes, including phase transformation, particle cracking, oxygen gas release, and transition-metal ion dissolution. Existing single-/double-layer coating strategies face drawbacks such as poor component contact and complexity. Herein, we present the results of a low-temperature atomic layer deposition (ALD) process for creating a TiO2/Al2O3 bilayer on composite cathodes made of AS200 (Li1.08Ni0.34Co0.08Mn0.5O2). Electrochemical analysis demonstrates that TiO2/Al2O3-coated LLO electrodes exhibit improved discharge capacities and enhanced capacity retention compared with uncoated samples. The TAA-5/AS200 bilayer-coated electrode, in particular, demonstrates exceptional capacity retention (∼90.4%) and a specific discharge capacity of 146 mAh g-1 after 100 cycles at 1C within the voltage range of 2.2 to 4.6 V. The coated electrodes also show reduced voltage decay, lower surface film resistance, and improved interfacial charge transfer resistances, contributing to enhanced stability. The ALD-deposited TiO2/Al2O3 bilayer coatings exhibit promising potential for advancing the electrochemical performance of lithium-rich layered oxide cathodes in lithium-ion batteries.

19 December 2012 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
MHMin-Feng Hung
Min-Feng Hung
YWYung-Chun Wu
Yung-Chun Wu
JCJiun-Jye Chang
Jiun-Jye Chang
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
A polycrystalline silicon (poly-Si) channel twin thin-film transistor (twin-TFT) nonvolatile memory (NVM) device with In-Ga-Zn-Ox (IGZO) as a storage layer is demonstrated. IGZO-FG twin-TFT NVM exhibits a large memory window ΔVth. A VCG at 18 V for 10 ms can achieve 5.6 V of ΔVth. An extrapolation of the memory window to ten years demonstrates that the stored charge still remains 65% of its initial value. Coupling ratio effect and gate length effect are discussed in detail. Such a low-temperature IGZO-FG twin-TFT NVM device is feasible for integration in IGZO-based display circuits for system-on-panel applications.

4 February 2020 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
Dun-Bao RuanDun-Bao Ruan
Dun-Bao Ruan
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
SYShih-Han Yi
Shih-Han Yi
HYHsin-I Yeh
Hsin-I Yeh
GLGuan-Ting Liu
Guan-Ting Liu
A low equivalent-oxide-thickness of 0.58 nm and a low gate leakage current density of ~2×10-5 A/cm2 at VG= VFB -1 V in p-substrate Ge (pGe) MOS device can be simultaneously achieved by a hydrogen plasma (H*) treatment on GeO2 interfacial layer (IL). It is found that the removal of GeOx with low oxidation state in GeO2 IL play crucial roles on electrical characteristics of pGe MOS device. Through a H* treatment, the electrical and reliability characteristics are improved by a GeO2 IL with high oxidation state. Therefore, a GeO2 IL with H* treatment is promising for high performance pGe MOS devices.

1 January 2019 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
YLYan-Lin Li
Yan-Lin Li
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
CLChen-Chien Li
Chen-Chien Li
HFHao-Ting Feng
Hao-Ting Feng
CKChia-Hung Kao
Chia-Hung Kao
GLGuang-Li Luo
Guang-Li Luo

8 December 2020 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
YLYan-Lin Li
Yan-Lin Li
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
CLChen-Chien Li
Chen-Chien Li
CHChin-Hsiu Huang
Chin-Hsiu Huang
STShang-Fu Tsai
Shang-Fu Tsai
HFHsin-Kai Fang
Hsin-Kai Fang
Effects of high-k gate stacks and plasma treatments on electrical and reliability characteristics of FinFET were comprehensively studied in this work. A higher on-current, higher on-/off-current ratio, smaller subthreshold swing (S.S.), lower gate leakage current, and better reliability characteristics in FinFETs are simultaneously achieved by a HfO₂/ZrO₂/HfO₂ gate stack. The improvement can be attributed to its higher k-value, fewer oxide traps, and oxygen vacancy in gate stack. A higher on-current of FinFET can be obtained with an F-based plasma treatment, which, however, also induces a larger gate leakage current. A plasma treatment with F- and N-based ambient on gate stack is shown to obtain a higher on-current and acceptable gate leakage in FinFET. Furthermore, a larger on-current, higher on-/off-current ratio, and a smaller S.S. in FinFET can be achieved with a TiO₂ stacked gate dielectric.

22 March 2017 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
SYShih-Han Yi
Shih-Han Yi
KCKuei-Shu Chang-Liao
Kuei-Shu Chang-Liao
TWTzung-Yu Wu
Tzung-Yu Wu
CHChia-Wei Hsu
Chia-Wei Hsu
JHJiayi Huang
Jiayi Huang
An equivalent oxide thickness of ~0.53 nm, gate leakage current density of ~10 -4 A/cm 2 at V FB + 1 V, I ON /I OFF ratio of 10 4 , subthreshold swing of 136 mV/dec, and peak hole mobility of 375 cm 2 /V-s at N inv = 1.6 × 10 12 cm -2 in Ge p-type metal-oxide-semiconductor-field-effect transistors (pMOSFETs) are achieved by HfO 2 /Hf-cap/GeO x gate stack with suitable post-metal-annealing (PMA) treatments. Such a high mobility in Ge pMOSFETs can be attributed to an ultrathin GeOx layer at the surface of Ge substrate. Ge +1 and Ge +2 in GeO x layer are re-oxidized to higher oxidation state by gettered oxygen, which is captured by Hf-cap from GeO x and HfO 2 during PMA. The minimized contents of Ge +1 and Ge +2 in GeO x are crucial to achieve excellent electrical characteristics.