Idriss Abid

Dr. Idriss Abid


Research Focus & Metrics

Academic Career Length

7Years (2020-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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10 March 2021 in Electronics
Verified
Journal Article
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IAIdriss Abid
Idriss Abid
JMJash Mehta
Jash Mehta
YCYvon Cordier
Yvon Cordier
JDJoff Derluyn
Joff Derluyn
SDStefan Degroote
Stefan Degroote
Farid MedjdoubFarid Medjdoub
Farid Medjdoub
High power electronics using wide bandgap materials are maturing rapidly, and significant market growth is expected in a near future. Ultra wide bandgap materials, which have an even larger bandgap than GaN (3.4 eV), represent an attractive choice of materials to further push the performance limits of power devices. In this work, we report on the fabrication of AlN/AlGaN/AlN high-electron mobility transistors (HEMTs) using 50% Al-content on the AlGaN channel, which has a much wider bandgap than the commonly used GaN channel. The structure was grown by metalorganic chemical vapor deposition (MOCVD) on AlN/sapphire templates. A buffer breakdown field as high as 5.5 MV/cm was reported for short contact distances. Furthermore, transistors have been successfully fabricated on this heterostructure, with low leakage current and low on-resistance. A remarkable three-terminal breakdown voltage above 4 kV with an off-state leakage current below 1 μA/mm was achieved. A regrown ohmic contact was used to reduce the source/drain ohmic contact resistance, yielding a drain current density of about 0.1 A/mm.

25 September 2020 in Materials
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Journal Article
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ATAlaleh Tajalli
Alaleh Tajalli
Matteo MeneghiniMatteo Meneghini
Matteo Meneghini
SBSven Besendörfer
Sven Besendörfer
RKRiad Kabouche
Riad Kabouche
IAIdriss Abid
Idriss Abid
GMGaudenzio Meneghesso
Gaudenzio Meneghesso
The aim of this work is to demonstrate high breakdown voltage and low buffer trapping in superlattice GaN-on-Silicon heterostructures for high voltage applications. To this aim, we compared two structures, one based on a step-graded (SG) buffer (reference structure), and another based on a superlattice (SL). In particular, we show that: (i) the use of an SL allows us to push the vertical breakdown voltage above 1500 V on a 5 µm stack, with a simultaneous decrease in vertical leakage current, as compared to the reference GaN-based epi-structure using a thicker buffer thickness. This is ascribed to the better strain relaxation, as confirmed by X-Ray Diffraction data, and to a lower clustering of dislocations, as confirmed by Defect Selective Etching and Cathodoluminescence mappings. (ii) SL-based samples have significantly lower buffer trapping, as confirmed by substrate ramp measurements. (iii) Backgating transient analysis indicated that traps are located below the two-dimensional electron gas, and are related to CN defects. (iv) The signature of these traps is significantly reduced on devices with SL. This can be explained by the lower vertical leakage (filling of acceptors via electron injection) or by the slightly lower incorporation of C in the SL buffer, due to the slower growth process. SL-based buffers therefore represent a viable solution for the fabrication of high voltage GaN transistors on silicon substrate, and for the simultaneous reduction of trapping processes.

17 January 2020 in Micromachines
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Journal Article
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ATAlaleh Tajalli
Alaleh Tajalli
MBMatteo Borga
Matteo Borga
Matteo MeneghiniMatteo Meneghini
Matteo Meneghini
Carlo De SantiCarlo De Santi
Carlo De Santi
DBDavide Benazzi
Davide Benazzi
GMGaudenzio Meneghesso
Gaudenzio Meneghesso
We investigated the origin of vertical leakage and breakdown in GaN-on-Si epitaxial structures. In order to understand the role of the nucleation layer, AlGaN buffer, and C-doped GaN, we designed a sequential growth experiment. Specifically, we analyzed three different structures grown on silicon substrates: AlN/Si, AlGaN/AlN/Si, C:GaN/AlGaN/AlN/Si. The results demonstrate that: (i) the AlN layer grown on silicon has a breakdown field of 3.25 MV/cm, which further decreases with temperature. This value is much lower than that of highly-crystalline AlN, and the difference can be ascribed to the high density of vertical leakage paths like V-pits or threading dislocations. (ii) the AlN/Si structures show negative charge trapping, due to the injection of electrons from silicon to deep traps in AlN. (iii) adding AlGaN on top of AlN significantly reduces the defect density, thus resulting in a more uniform sample-to-sample leakage. (iv) a substantial increase in breakdown voltage is obtained only in the C:GaN/AlGaN/AlN/Si structure, that allows it to reach VBD > 800 V. (v) remarkably, during a vertical I–V sweep, the C:GaN/AlGaN/AlN/Si stack shows evidence for positive charge trapping. Holes from C:GaN are trapped at the GaN/AlGaN interface, thus bringing a positive charge storage in the buffer. For the first time, the results summarized in this paper clarify the contribution of each buffer layer to vertical leakage and breakdown.

14 September 2022 in Micromachines
Verified
Journal Article
Open access
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IAIdriss Abid
Idriss Abid
YHYoussef Hamdaoui
Youssef Hamdaoui
JMJash Mehta
Jash Mehta
JDJoff Derluyn
Joff Derluyn
Farid MedjdoubFarid Medjdoub
Farid Medjdoub
We report on the fabrication and electrical characterization of AlGaN/GaN normally off transistors on silicon designed for high-voltage operation. The normally off configuration was achieved with a p-gallium nitride (p-GaN) cap layer below the gate, enabling a positive threshold voltage higher than +1 V. The buffer structure was based on AlN/GaN superlattices (SLs), delivering a vertical breakdown voltage close to 1.5 kV with a low leakage current all the way to 1200 V. With the grounded substrate, the hard breakdown voltage transistors at VGS = 0 V is 1.45 kV, corresponding to an outstanding average vertical breakdown field higher than 2.4 MV/cm. High-voltage characterizations revealed a state-of-the-art combination of breakdown voltage at VGS = 0 V together with low buffer electron trapping effects up to 1.4 kV, as assessed by means of substrate ramp measurements.