Liqiang Cao

Liqiang Cao


Research Focus & Metrics

Academic Career Length

16Years (2011-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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21 June 2024 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
FHFengze Hou
Fengze Hou
ZSZhanxing Sun
Zhanxing Sun
MSMeiying Su
Meiying Su
JFJiajie Fan
Jiajie Fan
XYXiangan You
Xiangan You
GZGuoqi Zhang
Guoqi Zhang
Silicon carbide (SiC) devices have shown definite advantages over Si counterparts in high-temperature, high-voltage, and high-frequency applications. To fully exploit the potentiality of SiC devices in high temperatures, die-attach materials that can withstand high temperatures for a long time are required in the power electronics packaging. In this article, the high-temperature die-attach materials, such as high-temperature solders and transient liquid-phase bonding materials, were reviewed first. Then, metallic (mainly Ag and Cu) nanoparticles (NPs) sintering technologies were thoroughly overviewed. The metallic NPs sintering materials, metallic NPs sintering process, and interface and reliability were analyzed, respectively. Finally, the challenges and outlook of promising Cu NPs sintering technology were discussed.

23 February 2022 in Materials
Verified
Journal Article
Open access
PDF file
CCchuan chen
chuan chen
MSMeiying Su
Meiying Su
RMRui Ma
Rui Ma
YZYunyan Zhou
Yunyan Zhou
JLJun Li
Jun Li
LCLiqiang Cao
Liqiang Cao
This paper focuses on characterizing the evolution of warpage, effects of epoxy molding compound (EMC), and effects of carrier 2 (the second carrier in the process) of 12 inch RDL-first multi-die fan-out wafer-level packaging (FOWLP) during the manufacturing process. The linear viscoelasticity properties of EMC and polyimide (PI) were characterized using dynamic mechanical analysis (DMA) in the frequency domain at different temperatures., The elastic and viscoelastic model were used for PI and EMC, the finite element analyses (FEA) of the cured structure were carried out and the results were compared with the test results. The viscoelastic properties of the EMC in the FEA could predict the wafer warpage more accurately. The FEA and experiments were used to investigate the evolution of warpage. The molding had a great influence on the warpage. The effects of the EMC and carrier 2 were also investigated with FEA. The wafer warpage could be reduced by lowering the thickness of the EMC, increasing the thickness of carrier 2, and selecting EMC and carrier 2 with a matched coefficient of thermal expansion (CTE).

6 April 2020 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
FHFengze Hou
Fengze Hou
Hengyun ZhangHengyun Zhang
Hengyun Zhang
DHDezhu Huang
Dezhu Huang
JFJiajie Fan
Jiajie Fan
FLFengman Liu
Fengman Liu
GZGuoqi Zhang
Guoqi Zhang
In this article, a microchannel thermal management system (MTMS) with the two-phase flow using the refrigerant R1234yf with low global warming potential is presented. The thermal test vehicles (TTVs) were made of either single or multiple thermal test chips embedded in the substrates, which were then attached to the MTMS. The system included two identical aluminum microchannel heat sinks (MHSs) connected in series in the cooling loop, which also consisted of a gas flowmeter, a miniature compressor, a condenser, a throttling device, and accessory measurement components. The experimental results showed that the thermal management system could dissipate a heat flux of 526 W/cm 2 while maintaining the junction temperature below 120 °C. For SiC mosfet with a higher junction temperature, e.g., 175 °C, the current system is expected to dissipate a heat flux as high as about 750 W/cm 2 . The effects of the rotational speed of the compressor, the opening of the throttling device, TTV layout on MHS, and a downstream heater on the cooling performance of the system were analyzed in detail. The study shows that the present thermal management with a two-phase flow system is a promising cooling technology for the high heat flux SiC devices.

25 May 2020 in IEEE Antennas and Wireless Propagation Letters
Verified
Journal Article
Closed access
WWWeikang Wan
Weikang Wan
MXMei Xue
Mei Xue
LCLiqiang Cao
Liqiang Cao
TYTianchun Ye
Tianchun Ye
QWQidong Wang
Qidong Wang
In this letter, a patch driven low-profile broadband metasurface antenna is proposed. The novel antenna is constituted utilizing an aperture coupled patch and proposed configurations of finite sized AMC. With the surrounding metasurface excited by the surface wave introduced through the center patch, an additional TM resonance is generated and a wideband impedance matching is achieved. The performance and operating mechanism of the proposed antenna are investigated and analyzed. To demonstrate the concept, a 1×4 array with an overall thickness of 0.047 λ $_0$ (λ $_0$ is the free space wavelength at 28 GHz) is successfully implemented through advanced substrate manufacturing process. The obtained impedance bandwidth for reflection coefficient below -10 dB is 27.1% with a maximum realized gain of 13.6 dBi.

22 January 2021 in IEEE Antennas and Wireless Propagation Letters
Verified
Journal Article
Closed access
MXMei Xue
Mei Xue
WWWeikang Wan
Weikang Wan
QWQidong Wang
Qidong Wang
LCLiqiang Cao
Liqiang Cao
A millimeter-wave (mmWave) broadband metasurface antenna with low profile is proposed. The radiator composed of four groups of coplanar patches with different dimensions has four adjacent broadside characteristic modes. Coaxial probe feeding is selected carefully to excite the four modes to broaden impedance bandwidth. Dual slots are etched on the patch fed by the coaxial probe to reduce H-plane cross-polarization levels. Characteristic mode analysis (CMA) and input impedance analysis are performed to characterize its resonance behaviors. The proposed antenna with dimension of 1.03 × 1.03 × 0.023 λ 0 3 (λ 0 is wavelength at 28 GHz in free space) realizes 16% (26.1 GHz-30.7 GHz) impedance bandwidth for |S 11 | ≤ -10 dB. Realized peak gain is up to 10.1 dBi and 3 dB gain bandwidth is 22% (24.4 GHz-30.5 GHz). H-plane cross-polarization levels are less than -16 dB.

12 March 2019 in IEEE Transactions on Components, Packaging and Manufacturing Technology
Verified
Journal Article
Closed access
FHFengze Hou
Fengze Hou
WWWenbo Wang
Wenbo Wang
TLTingyu Lin
Tingyu Lin
LCLiqiang Cao
Liqiang Cao
GZG. Q. Zhang
G. Q. Zhang
JFJ. A. Ferreira
J. A. Ferreira
In this paper, a novel fan-out panel-level PCB embedded package technology for SiC MOSFET power module is presented to address parasitic inductances, heat dissipation, and reliability issues that are inherent with aluminum wires used in conventional packaging scheme. To withstand high temperature beyond 175 °C and high voltage over 1.2 kV and improve thermo-mechanical reliability of the fan-out panel-level PCB embedded SiC power module, BT laminate and prepreg with high temperature stability, high dielectric strength, CTE matching with SiC, and high Tg are selected as PCB embedded package materials. Then, high temperature stabilities, dielectric breakdown strength, and thermo-mechanical performances of the embedded materials are characterized. The experimental results show that the PCB embedded materials can withstand high temperature beyond 200 °C and high voltage above 1.2 kV. Tg is as high as over 260 °C and CTE is matching with SiC. Besides, in order to provide one guideline for the high-temperature and high-pressure laminating process during the PCB embedded SiC MOSFETs packaging, cure kinetics of BT prepreg are analyzed. The results show that one-hour curing time at 280 °C curing temperature and two-hour curing time at 210 °C curing temperature can ensure the full cure of the BT prepreg.