Ronald Dekker

Ronald Dekker


Research Focus & Metrics

Academic Career Length

10Years (2017-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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15 August 2019 in Micromachines
Verified
Journal Article
Open access
PDF file
WSWilliam Fausto Quiros Solano
William Fausto Quiros Solano
NGNikolas Gaio
Nikolas Gaio
CSCinzia Silvestri
Cinzia Silvestri
GPGregory Pandraud
Gregory Pandraud
RDRonald Dekker
Ronald Dekker
PSPasqualina Sarro
Pasqualina Sarro
Organ-on-chip (OOC) is becoming the alternative tool to conventional in vitro screening. Heart-on-chip devices including microstructures for mechanical and electrical stimulation have been demonstrated to be advantageous to study structural organization and maturation of heart cells. This paper presents the development of metal and polymeric strain gauges for in situ monitoring of mechanical strain in the Cytostretch platform for heart-on-chip application. Specifically, the optimization of the fabrication process of metal titanium (Ti) strain gauges and the investigation on an alternative material to improve the robustness and performance of the devices are presented. The transduction behavior and functionality of the devices are successfully proven using a custom-made set-up. The devices showed resistance changes for the pressure range (0–3 kPa) used to stretch the membranes on which heart cells can be cultured. Relative resistance changes of approximately 0.008% and 1.2% for titanium and polymeric strain gauges are respectively reported for membrane deformations up to 5%. The results demonstrate that both conventional IC metals and polymeric materials can be implemented for sensing mechanical strain using robust microfabricated organ-on-chip devices.

8 April 2021 in Micromachines
Verified
Journal Article
Open access
PDF file
MKMarta Maria Kluba
Marta Maria Kluba
JLJian Li
Jian Li
KPKatja Parkkinen
Katja Parkkinen
MLMarcus Louwerse
Marcus Louwerse
JSJaap Snijder
Jaap Snijder
RDRonald Dekker
Ronald Dekker
Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer-defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity-BOX) that contains a patterned BOX layer. The patterned BOX can form a buried microchannels network, or serve as a stop layer and a buried hard-etch mask, to accurately pattern the device layer while etching it from the backside of the wafer using the cleanroom microfabrication compatible tools and methods. The use of the cavity-BOX as a buried hard-etch mask is demonstrated by applying it for the fabrication of a deep brain stimulation (DBS) demonstrator. The demonstrator consists of a large flexible area and precisely defined 80 µm-thick silicon islands wrapped into a 1.4 mm diameter cylinder. With cavity-BOX, the process of thinning and separating the silicon islands was largely simplified and became more robust. This test case illustrates how cavity-BOX wafers can advance the fabrication of various MEMS devices, especially those with complex geometry and added functionality, by enabling more design freedom and easing the optimization of the fabrication process.

11 August 2017 in Proceedings
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Conference Paper
Open access
PDF file
MKMarta Maria Kluba
Marta Maria Kluba
AAAslihan Arslan
Aslihan Arslan
RSRonald Stoute
Ronald Stoute
JMJames Muganda
James Muganda
RDRonald Dekker
Ronald Dekker
This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step, multidimensional microchannels with various dimensions (width, length, and depth) can be obtained by tuning the process and design parameters. These fully embedded structures enable further wafer processing and integration of electronic components like sensors and actuators in wafers with microchannels.

10 December 2018 in Proceedings
Verified
Conference Paper
Open access
PDF file
MKMarta Maria Kluba
Marta Maria Kluba
BMBruno Morana
Bruno Morana
ASAngel Savov
Angel Savov
HZHenk. W. van Zeijl
Henk. W. van Zeijl
GPGregory Pandraud
Gregory Pandraud
RDRonald Dekker
Ronald Dekker
We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in parylene-based flexible thin film. This fully CMOS compatible approach uses optimized DRIE processes and an SiO2 mesh-shaped mask, allowing for the simultaneous definition of micrometer- to millimeter-sized structures without compromising the flexibility of the device. In a single fabrication flow a unique freedom in dimensions of both the flexible film and the silicon islands can be achieved making this new technique ideal for the realization of semi-flexible/foldable implantable devices, where structures of different sizes have to be combined together for the ultimate miniaturization.