In this brief, we present a novel pipelined architecture for real-valued fast Fourier transform (RFFT), which is dedicated to processing serial input data. An optimized algorithm is proposed for stage division in RFFT to achieve an area-efficient RFFT computing structure with full hardware utilization. A single path butterfly and a real rotator are merged into one processing element (PE) in each stage, except the last stage, to reduce hardware resource utilization. In addition, a novel shift-adder is designed for $N$ -point RFFT with $W$ -bit signals, and a new data management method based on the PEs is proposed, which saves resources with a more regular flow graph.

Emerging energy harvesting technology can harvest and convert ambient energy into electrical power. It is a quite effective way to extend the lifetime of Wireless Multihop Networks (WMNs), and has been widely applied in WMNs. Meanwhile, the interference-free link scheduling is an indispensable operation in WMNs to reduce energy waste caused by link collision. In the energy harvesting WMNs with link scheduling, a few works take into account the impact of non-ideal battery on energy efficiency and network lifetime. This paper studies the harvested energy-saving link scheduling problem in the energy harvesting WMNs under the imperfect storage efficiency. We establish the energy model to index the link weight with the harvested energy consumed on it. Furthermore, we propose a Centralized Scheduling (CS) algorithm, a Centralized Scheduling with Minimum interference weights (CSM) algorithm and a distributed one to activate the links with the maximum weights so as to maximize the utilization of the harvested energy and to minimize the energy stored in the battery. Finally, this paper conducts the simulation experiment to verify the effectiveness of our algorithms and the correctness of our theoretical analysis.

Real-time sensor signal acquisition poses new challenges in data transmission and storage. Therefore, it is beneficial to insert a lossless compression system between the sensor signal’s generation and subsequent data transmission. Additionally, the compression algorithm must consider both the compression ratio and throughput. This study proposes a two-stage lossless compression system using an integer adaptive predictor to address the inherent data diversity in digital signals and improve the compression ratio. Meanwhile, high-throughput hardware architecture is implemented for the compression system. The experimental results show that our stream-based lossless compression system improves the compression ratio by 10.5%-40.0% compared with the traditional compressor; up to 16.9% compared with the reported stream-based compressor and can operate at a speed of 800MB/s on a field-programmable gate array (FPGA).

This brief introduces an optimised architecture for a serial commutator (SC) pipelined fast Fourier transform (FFT) with fully real data paths, utilising a novel data management scheme based on bit-dimension permutation circuits. By employing this approach, we minimised multiplexer utilisation by 80% in every processing element (PE) and 50% in every permutation circuit of each stage compared to the conventional SC architecture. Additionally, the proposed structure achieved full hardware utilisation with a natural-order input/output (I/O) datastream. Experimental results demonstrate that our architecture reduced look-up table (LUT) logic by 31% compared to the prior design.

In the Dynamic Rechargeable Networks (DRNs), to maximize the throughput by efficient energy allocation, the existing studies usually consider the spatio-temporal dynamic factors of the harvested energy, and seldom the network dynamic factors simultaneously, such as the time variable network resources and wireless interference. To take the network dynamic factors together, this paper studies the quite challenging problem, the network throughput maximization in the DRNs. We introduce the Time-Expanded Graph (TEG) to describe the above dynamic factors in an obvious way and design the Single Pair Throughput maximization (SPT) algorithm based on TEG. In the case of multiple pairs of source-targets, this paper introduces the Garg and Könemann's framework and then designs the Multiple Pairs Throughput (MPT) algorithm to maximize the overall throughput of all pairs. To reduce the time complexity, this paper proposes a Distributed and Parallel Throughput algorithm (DPT). In real applications, the network dynamic factors may not be known in advance. This paper proposes an Online Time-Span Algorithm (OTA) with Markov approximation and Lyapunov optimization, and conducts the extensive numerical evaluation based on the simulated data and the data collected by our real system. The numerical simulation results demonstrate the throughput improvement of our algorithms.

In low-duty-cycle wireless networks with unreliable and correlated links, Opportunistic Routing (OR) is extremely costly because of the unaligned working schedules of nodes within a common candidate forwarder set. In this work, we propose a novel polynomial-time node scheduling scheme considering link correlation for OR in low-duty-cycle wireless networks (LDC-COR), which significantly improves the performance by assigning nodes with low correlation to a common group and scheduling the nodes within this group to wake up simultaneously for forwarding packets in a common cycle. By taking account of both link correlation and link quality, the performance of the expected transmission count (ETX) is improved by adopting the LDC-COR protocol. As a result, the energy consumption of low-duty-cycle OR is significantly reduced. LDC-COR only requires the information of one-hop neighboring nodes which introduces minimal communication overhead. The proposed LDC-COR bridges the gap between the nodes’ limited energy resource and the application lifetime requirements. We evaluate the performance of LDC-COR with extensive simulations and a physical wireless testbed consisting of 20 TelosB nodes. The evaluation results show that both transmission efficiency and energy consumption of low-duty-cycle OR are significantly improved with only a slight increase of end-to-end delay.