We report the integration of a ferroelectric (FE) silicon-doped hafnium oxide material in ferroelectric field-effect transistor (FeFET) devices fabricated with an optimized interfacial layer in a gate-first scheme. The effect of increasing the permittivity (k) value of the interface layer on the performance of the metal-ferroelectric-insulator-semiconductor (MFIS)-FE-HfO ₂ FeFET is studied in terms of its switching characteristics, endurance, and retention. In contrast to the previous work, the FE Si:HfO ₂ -integrated FeFET devices show a low-power operation capability as well as an improved endurance characteristics without jeopardizing high-temperature retention. The utilization of an optimized SiON interface layer for MFIS-HfO ₂ FeFET stack is discussed, and the improvements are outlined with reference to a standard low-k SiO ₂ interface.

The recent discovery of ferroelectricity in thin film HfO₂ materials renewed the interest in ferroelectric FET (FeFET) as an emerging nonvolatile memory providing a potential high speed and low power Flash alternative. Here, we report more insight into FeFET performance by integrating two types of ferroelectric (FE) materials and varying their properties. By varying the material type [HfO₂ (HSO) versus hafnium zirconium oxide (HZO)], optimum content (Si doping/mixture ratio), and film thickness, a material relation to FeFET device physics is concluded. As for the material type, an improved FeFET performance is observed for HZO integration with memory window (MW) comparable to theoretical values. For different Si contents, the HSO based FeFET exhibited a MW trend with different stabilized phases. Similarly, the HZO FeFET shows MW dependence on the Hf:Zr mixture ratio. A maximized MW is obtained with cycle ratios of 16:1 (HfO₂:Si) and 1:1 (Hf:Zr) as measured on HSO and HZO based FeFETs, respectively. The thickness variation shows a trend of increasing MW with the increased FE layer thickness confirming early theoretical predictions. The FeFET material aspects and stack physics are discussed with insight into the interplay factors, while optimum FE material parameters are outlined in relation to performance.

The local crystal phase and orientation of ferroelectric grains inside TiN/Hf_0.5Zr_0.5O₂/TiN have been studied by the analysis of the local electron beam scattering Kikuchi patterns, recorded in transmission. Evidence was found that the ferroelectric phase of the layers is derived from an orthorhombic phase, most likely of space group Pca2₁. The orientation analysis reveals a strong out-of-plane texture of the polycrystalline film which is in accordance with a high remanent polarization P_r observed for P-V measurements. The results of this analysis help us to further optimize the ratio of ferroelectric grains and their orientation for many applications, e.g., in the field of emerging memory or infrared sensors.

In spite of the increasing use of machine learning techniques, in-memory computing and hardware have increased the interest to accelerate neural network operation. Henceforth, novel embedded nonvolatile memories (eNVMs) for highly scaled technology nodes, like ferroelectric field effect transistors (FeFETs), are heavily studied and very promising. Furthermore, inference and on-chip learning can be fostered by further eNVM technology options, such as multibit operation and linear switching. In this article, we present the advantages of hafnium oxide-based FeFETs for such purposes due to their basic three-terminal structure, which allows to selectively activate or deactivate selected devices as well as tune linearity and dynamic range for certain applications. Furthermore, we discuss the impact of the material properties of the ferroelectric layer, the interface layer thickness, and scaling on the device performance. Here, we demonstrate good device properties even for highly scaled devices (100 nm x 100 nm).

A novel system-on-a-chip compatible one-transistor one-capacitor ferroelectric random-access memory array (1T1C FeRAM) based on ferroelectric Hf0.5Zr0.5O2 with a capacitor under bitline (CUB) structure was experimentally demonstrated. The CUB structure facilitates the application of post-metallization annealing on metal/ferroelectric/metal capacitors above 500∘C because they are fabricated before the back-end-of-line process. A large remanent polarization of 2Pr > 40 μC/cm2, projected endurance > 1011 cycles, and ten years of data retention at 85∘C were obtained at 500∘C, after metallization using a single large capacitor. Furthermore, a large memory window of the 64 kbit 1T1C FeRAM array with 500∘C post-metallization was comprehensively demonstrated without degradation of the underlying CMOS logic transistors. The operation voltage and speed dependence were extensively investigated using a dedicated sense amplifier for the 1T1C FeRAM. Furthermore, the perfect bit functionality at an operation voltage of 2.5 V and a read/write speed < 10 ns were obtained. Therefore, superior properties of CUB-structured 1T1C FeRAM can be achieved by flexible process engineering of crystallization annealing for metal/ferroelectric/metal fabrication.

The microstructure of ferroelectric hafnium oxide plays a vital role for its application, e.g., non-volatile memories. In this study, transmission Kikuchi diffraction and scanning transmission electron microscopy STEM techniques are used to compare the crystallographic phase and orientation of Si and Zr doped HfO₂ thin films as well as integrated in a 22 nm fully-depleted silicon-on-insulator (FDSOI) ferroelectric field effect transistor (FeFET). Both HfO₂ films showed a predominately orthorhombic phase in accordance with electrical measurements and X-ray diffraction XRD data. Furthermore, a stronger texture is found for the microstructure of the Si doped HfO₂ (HSO) thin film, which is attributed to stress conditions inside the film stack during crystallization. For the HSO thin film fabricated in a metal-oxide-semiconductor (MOS) like structure, a different microstructure, with no apparent texture as well as a different fraction of orthorhombic phase is observed. The 22 nm FDSOI FeFET showed an orthorhombic phase for the HSO layer, as well as an out-of-plane texture of the [111]-axis, which is preferable for the application as non-volatile memory.