Egidio Ragonese

Prof. Egidio Ragonese

orcid

Research Focus & Metrics

Academic Career Length

24Years (2003-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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14 May 2015 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
VFVincenzo Fiore
Vincenzo Fiore
PBPlacido Battiato
Placido Battiato
SASahel Abdinia
Sahel Abdinia
SJStephanie Jacobs
Stephanie Jacobs
ICIsabelle Chartier
Isabelle Chartier
GPGiuseppe Palmisano
Giuseppe Palmisano
This paper presents the first printed organic 13-MHz RFID on flexible substrate. The proposed solution includes a planar near field antenna bonded to an RFID tag, which is printed on flexible foil using an organic complementary TFT technology. Thanks to an active envelope detector, ASK modulation with modulation depth as low as 20% can be adopted to increase the available input power for the rectifier. The RFID functionality is demonstrated at the internally generated supply voltage of 24 V, for a reading range of 2-5 cm and a bit-rate up to 50 bit/s. With more than 250 transistors on the same foil, this work represents the most complex circuit ever published in a printed organic complementary TFT technology.

24 May 2013 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
GMGiorgio Maiellaro
Giorgio Maiellaro
Egidio RagoneseEgidio Ragonese
Egidio Ragonese
ACAlessandro Castorina
Alessandro Castorina
SJStephanie Jacob
Stephanie Jacob
MBMohammed Benwadih
Mohammed Benwadih
GPGiuseppe Palmisano
Giuseppe Palmisano
This paper presents the design and experimental results of advanced analog blocks manufactured in a printed complementary organic TFT technology on flexible foil. Operational transconductance amplifiers exhibiting open-loop gain from 40 to 50 dB and gain-bandwidth product from 55 Hz to 1.5 kHz have been implemented by using different circuit topologies. An extensive amplifier characterization in both time and frequency domain (i.e., gain, gain-bandwidth product, phase margin, settling time, harmonic distortion) has been carried out, which demonstrates the performance of the adopted technology in analog circuit implementations. Finally, a 40-dB 1.5-kHz amplifier has been employed in a switched capacitor comparator that proved fully functionality up to input frequency of 50 Hz.

8 May 2006 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
TBT. Biondi
T. Biondi
ASA. Scuderi
A. Scuderi
Egidio RagoneseEgidio Ragonese
Egidio Ragonese
GPG. Palmisano
G. Palmisano
The analysis and modeling of monolithic stacked transformers fabricated in a high-speed silicon bipolar technology is addressed. On-wafer experimental measurements are employed to investigate the effect of layout scaling on transformer performance parameters (i.e., self-resonance frequency, magnetic coupling coefficient, and insertion loss). Based on this analysis, a wideband lumped model is developed, whose parameters are related to layout and technological data through closed-form expressions. Model accuracy is demonstrated by comparing simulated and measured S-parameters, coil inductance, magnetic coupling coefficient, and maximum available gain of several transformers with scaled layout geometry. The self-resonance frequency is also employed as a figure-of-merit to demonstrate model accuracy at very high frequency.

10 April 2006 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
FCF. Carrara
F. Carrara
AIA. Italia
A. Italia
Egidio RagoneseEgidio Ragonese
Egidio Ragonese
GPG. Palmisano
G. Palmisano
In this paper, a design methodology for the optimization of transformer-loaded RF circuits is presented. The optimization procedure is based on a novel figure of merit for the integrated transformer (namely the transformer characteristic resistance), which was introduced to quantify its performance when operated as a tuned load. Using the proposed approach, a highly linear up-converter for 5-GHz wireless LAN applications was implemented in a 45-GHz-f/sub T/ SiGe HBT technology. The circuit achieved an output 1-dB compression point of 4.5 dBm and a power gain of 18 dB, while drawing only 34 mA from a 3-V power supply.

6 September 2017 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
Egidio RagoneseEgidio Ragonese
Egidio Ragonese
NSNunzio Spina
Nunzio Spina
ACAlessandro Castorina
Alessandro Castorina
PLPierpaolo Lombardo
Pierpaolo Lombardo
NGNunzio Greco
Nunzio Greco
GPGiuseppe Palmisano
Giuseppe Palmisano
This paper presents a fully integrated galvanically isolated dc-dc converter with data communication. The converter, which is fabricated in a 0.35-μm BCD technology, is made up of only two silicon dice and adopts two 6-kV on-chip transformers. It takes advantage of a customized architecture, which uses the isolated power control link to transfer bidirectional half-duplex data, thus reducing the overall silicon area and package size. The proposed dc-dc converter delivers up to 93-mW output power with 19% maximum power efficiency and an output voltage ranging from 2.4 V to 3.3 V, while achieving a data rate up to 50 Mb/s.

1 April 2014 in Organic Electronics
Verified
Journal Article
Closed access
SAS. Abdinia
S. Abdinia
Fabrizio TorricelliFabrizio Torricelli
Fabrizio Torricelli
GMG. Maiellaro
G. Maiellaro
RCR. Coppard
R. Coppard
ADA. Daami
A. Daami
ECE. Cantatore
E. Cantatore