In this article, the effects of two-step annealing at the active layer (AL) and the completed device on the electrical properties and stability of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) are studied. The subthreshold swing (SS) and stability of a-IGZO TFT devices are greatly improved, and the hump phenomenon under the negative bias illumination stability (NIBS) is particularly well suppressed when the TFT devices are treated with an optimum two-step annealing process (200 °C of preannealing and 300 °C of postannealing). Based on the analysis of the surface morphology, internal chemical state, and electrical properties of the IGZO thin film, an improvement of two-step annealing devices may be due to hydrogen filling the oxygen vacancies in the AL and well passivating the defects between insulating layer and AL. The result illustrates that two-step annealing is a promising method for IGZO TFT, which is not only beneficial to improve the stability of the device but also suppresses the hump phenomenon in NIBS.

In this paper, top-gate thin-film transistors (TFTs) of two stacked double-channel layers derived from atomic layer deposition in combination with the plasma-enhanced chemical vapor deposition (PECVD) process were fabricated. The Hall measurement shows that the Hall mobility of the indium gallium oxide (IGO)/indium gallium zinc oxide (IGZO) active layer is 1.6 times more that of the amorphous In-rich IGZO/IGZO layer due to superior carrier percolation conduction paths from the polycrystalline IGO layer. Furthermore, x-ray photoelectron spectroscopy analysis indicates that the IGO/IGZO film has much less oxygen vacancy concentration, which is advantageous in improving not only mobility but also stability. The optimized IGO/IGZO TFT showed both high mobility (38.0 cm2 V−1 s−1) and high stability (ΔVTH = +0.14 V) of a positive bias stress under post-deposition annealing at 250 °C. This strategy provides a feasible process for realizing high-performance TFTs that is compatible with ALD-derived oxides and commercial PECVD techniques in the industry.

Thin film transistors (TFTs) as the core devices for displays, are widely used in various fields including ultra-high-resolution displays, flexible displays, wearable electronic skins and memory devices, especially in terms of sensors. TFTs have now started to move towards miniaturization. Similarly to MOSFETs problem, traditional planar structure TFTs have difficulty in reducing the channel’s length sub-1μm under the existing photolithography technology. Vertical channel thin film transistors (V-TFTs) are proposed. It is an effective solution to overcome the miniaturization limit of traditional planar TFTs. So, we summarize the different aspects of VTFTs. Firstly, this paper introduces the structure types, key parameters, and the impact of different preparation methods in devices of V-TFTs. Secondly, an overview of the research progress of V-TFTs’ active layer materials in recent years, the characteristics of V-TFTs and their application in examples has proved the enormous application potential of V-TFT in sensing. Finally, in addition to the advantages of V-TFTs, the current technical challenge and their potential solutions are put forward, and the future development trend of this new structure of V-TFTs is proposed.

The performance of back channel etching (BCE) amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) was improved using a carbon tetrafluoride (CF $_{\text{4}}\text{)}$ plasma treatment of the back channel (BC) after the wet-etching process of source–drain (SD) electrodes. X-ray photoelectron spectroscopy (XPS) analysis showed that the wet-etching of H $_{\text{2}}$ O $_{\text{2}}$ -based etchant may result in Mo-related residue, which deteriorate a-IGZO BC. In comparison with as-etching indium gallium zinc oxide (IGZO) TFT, the saturation field effect mobility increases from 7.8 to 16.4 cm $^{\text{2}}$ /Vs, subthreshold swing (SS) decreases from 0.82 to 0.34 V/decade, the ratio of on current and off current improves from 7.3 $\times$ 10 $^{\text{5}}$ to 1.1 $\times$ 10 $^{\text{10}}$ , and the threshold voltage shift of negative bias illumination stability (NBIS) improves from $-$ 3.4 to $-$ 0.6 V. The fact confirmed that CF $_{\text{4}}$ plasma treatment of the BC can effectively reduce BC defects and improve the electrical characteristics of BCE IGZO TFT comprehensively.