In this paper, top-gate thin-film transistors (TFTs) of two stacked double-channel layers derived from atomic layer deposition in combination with the plasma-enhanced chemical vapor deposition (PECVD) process were fabricated. The Hall measurement shows that the Hall mobility of the indium gallium oxide (IGO)/indium gallium zinc oxide (IGZO) active layer is 1.6 times more that of the amorphous In-rich IGZO/IGZO layer due to superior carrier percolation conduction paths from the polycrystalline IGO layer. Furthermore, x-ray photoelectron spectroscopy analysis indicates that the IGO/IGZO film has much less oxygen vacancy concentration, which is advantageous in improving not only mobility but also stability. The optimized IGO/IGZO TFT showed both high mobility (38.0 cm2 V−1 s−1) and high stability (ΔVTH = +0.14 V) of a positive bias stress under post-deposition annealing at 250 °C. This strategy provides a feasible process for realizing high-performance TFTs that is compatible with ALD-derived oxides and commercial PECVD techniques in the industry.

Thin film transistors (TFTs) as the core devices for displays, are widely used in various fields including ultra-high-resolution displays, flexible displays, wearable electronic skins and memory devices, especially in terms of sensors. TFTs have now started to move towards miniaturization. Similarly to MOSFETs problem, traditional planar structure TFTs have difficulty in reducing the channel’s length sub-1μm under the existing photolithography technology. Vertical channel thin film transistors (V-TFTs) are proposed. It is an effective solution to overcome the miniaturization limit of traditional planar TFTs. So, we summarize the different aspects of VTFTs. Firstly, this paper introduces the structure types, key parameters, and the impact of different preparation methods in devices of V-TFTs. Secondly, an overview of the research progress of V-TFTs’ active layer materials in recent years, the characteristics of V-TFTs and their application in examples has proved the enormous application potential of V-TFT in sensing. Finally, in addition to the advantages of V-TFTs, the current technical challenge and their potential solutions are put forward, and the future development trend of this new structure of V-TFTs is proposed.

The performance of back channel etching (BCE) amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) was improved using a carbon tetrafluoride (CF $_{\text{4}}\text{)}$ plasma treatment of the back channel (BC) after the wet-etching process of source–drain (SD) electrodes. X-ray photoelectron spectroscopy (XPS) analysis showed that the wet-etching of H $_{\text{2}}$ O $_{\text{2}}$ -based etchant may result in Mo-related residue, which deteriorate a-IGZO BC. In comparison with as-etching indium gallium zinc oxide (IGZO) TFT, the saturation field effect mobility increases from 7.8 to 16.4 cm $^{\text{2}}$ /Vs, subthreshold swing (SS) decreases from 0.82 to 0.34 V/decade, the ratio of on current and off current improves from 7.3 $\times$ 10 $^{\text{5}}$ to 1.1 $\times$ 10 $^{\text{10}}$ , and the threshold voltage shift of negative bias illumination stability (NBIS) improves from $-$ 3.4 to $-$ 0.6 V. The fact confirmed that CF $_{\text{4}}$ plasma treatment of the BC can effectively reduce BC defects and improve the electrical characteristics of BCE IGZO TFT comprehensively.

In this paper, a facile modifying technique of source/drain regions conductivity was proposed for self-aligned top-gate In-Ga-Zn-O (IGZO) thin-film transistors (TFTs) by controlling the process parameter of the passivation layer at relatively low temperatures. The sheet resistance of the source and drain regions of IGZO was approximately 365 Ω/□, and there was no significant change within a month. The device parameters of mobility, threshold voltage, subthreshold swing, and current switching ratio of the fabricated device were 15.15 cm²V⁻¹s⁻¹, 0.09 V, 0.15 V/dec, and higher than 10⁹, respectively. The threshold voltage drift under negative bias illumination stress was −0.34 V. In addition, a lower channel width-normalized contact resistance of 9.86 Ω·cm was obtained.

In this work, top-gate structured W: F co-doped Zn–Sn–O (ZTO) thin-film transistors (TFTs) with excellent stability are prepared by the solution process. Comparing with the undoped ZTO TFT, the mobility of W: F co-doped ZTO TFTs was up from 1.87 to 3.14 cm² V⁻¹ s⁻¹, and the subthreshold swing decreases from 0.192 to 0.157 V/dec. Moreover, the W: F co-doped ZTO TFTs exhibit a small V_th shift of −0.09 V under negative bias illumination stress, which is close to one of the TFTs prepared by the traditional vacuum process. X-ray photoelectron spectroscopy and capacitance–voltage examination revealed that the enhanced stability is due to the fact that W: F co-doping can effectively suppress defect states in ZTO films. The results manifest that W: F co-doping may be a promising method for enhancing the stability of TFTs with the top-gate structure.

In this paper, the effect of a buffer layer created using different hydrogen-containing ratios of reactive gas on the electrical properties of a top-gate In-Ga-Zn-O thin-film transistor was thoroughly investigated. The interface roughness between the buffer layer and active layer was characterized using atomic force microscopy and X-ray reflection. The results obtained using Fourier transform infrared spectroscopy show that the hydrogen content of the buffer layer increases with the increase in the hydrogen content of the reaction gas. With the increase in the hydrogen-containing materials in the reactive gas, field effect mobility and negative bias illumination stress stability improve nearly twofold. The reasons for these results are explained using technical computer-aided design simulations.