In this paper, a compact planar dual-band multiple-input and multiple-output (MIMO) antenna with high isolation is presented to satisfy the increasing requirements of wireless communication. The proposed antenna array consists of two identical radiating elements which are fed through micro-strip lines. A rectangular micro-strip stub with defected ground plane is employed to achieve a high isolation which is less than −15 dB between the two antenna elements. The size of the entire MIMO antenna is 32 × 32 × 1.59 mm³, which is printed on an FR4 substrate. The proposed MIMO antenna is optimized to operate in 2.36–2.59 GHz and 3.17–3.77 GHz bands, which can cover the fifth-generation (5G) n7 (2.5–2.57 GHz) and the fourth-generation (4G) Long Term Evolution (LTE) band 42 (3.4–3.6 GHz). The proposed MIMO antenna is feasible for the 5G and 4G applications.

The thermal covert channels (TCCs) in many-core systems can cause detrimental data breaches. In this article, we present a three-step scheme to detect and fight against such TCC attacks. Specifically, in the detection step, each core calculates the spectrum of its own CPU workload traces that are collected over a few fixed time intervals, and then it applies a frequency scanning method to detect if there exists any TCC attack. In the next positioning step, the logical cores running the transmitter threads are located. In the last step, the physical CPU cores suspiciously engaging in a TCC attack have to undertake dynamic voltage frequency scaling (DVFS) such that any possible TCC trace will be essentially wiped out. Our experiments have confirmed that on average 97% of the TCC attacks can be detected, and with the proposed defense, the packet error rate (PER) of a TCC attack can soar to more than 70%, literally shutting down the attack in practical terms. The performance penalty caused by the inclusion of the proposed DVFS countermeasures is found to be only 3% for an $8\times 8$ many-core system.

This article discusses the challenges in intrachiplet and interchiplet networks, including the need for faster simulation, better architectures, and performance requirements determined by emerging applications.

Bufferless network-on-chip (NoC) designs have drawn research attention in massively parallel multicore systems via their significant benefits in power and area savings. However, it shows poor throughput and low bandwidth in current bufferless designs due to complex bufferless routing and arbitration. Especially in the NACK-based bufferless network, the network performance will be affected significantly as the network conflicts increased caused by packet retransmissions. To this end, we proposed a novel approximate bufferless network, ABNoC. ABNoC lessens network conflicts and packet retransmissions via an approximate allocation mechanism (AAM) and a packet approximation method. We show that, compared with SCARAB, ABNoC improved the bandwidth up to 1.92 times and achieved 1.2 times faster in runtime. Besides, ABNoC accomplished 83.6% retransmission reduction and 46.7% latency reduction, while maintaining low application error.