Liquid crystal polymer (LCP) has gained wide interest in the electronics industry largely due to its flexibility, stable insulation and dielectric properties and chip integration capabilities. Recently, LCP has also been investigated as a biocompatible substrate for the fabrication of multielectrode arrays. Realizing a fully implantable LCP-based bioelectronic device, however, still necessitates a low form factor packaging solution to protect the electronics in the body. In this work, we investigate two promising encapsulation coatings based on thin-film technology as the main packaging for LCP-based electronics. Specifically, a HfO₂–based nanolaminate ceramic (TFE1) deposited via atomic layer deposition (ALD), and a hybrid Parylene C-ALD multilayer stack (TFE2), both with a silicone finish, were investigated and compared to a reference LCP coating. T-peel, water-vapour transmission rate (WVTR) and long-term electrochemical impedance spectrometry (EIS) tests were performed to evaluate adhesion, barrier properties and overall encapsulation performance of the coatings. Both TFE materials showed stable impedance characteristics while submerged in 60 °C saline, with TFE1-silicone lasting more than 16 months under a continuous 14V DC bias (experiment is ongoing). The results presented in this work show that WVTR is not the main factor in determining lifetime, but the adhesion of the coating to the substrate materials plays a key role in maintaining a stable interface and thus longer lifetimes.

For mm-sized implants incorporating silicon integrated circuits, ensuring life-time operation of the chip within the corrosive environment of the body still remains a critical challenge. For the chips packaging, various polymeric and thin ceramic coatings have been reported, demonstrating high biocompatibility and barrier properties. Yet, for the evaluation of the final packaging and lifetime prediction, the conventional helium leak test method can no longer be used due to the mm-size of such implants. Alternatively, accelerated soak studies are typically used instead. For such studies, early detection of moisture/ion ingress using an in-situ platform may result in a better prediction of lifetime functionality. In this work, we have developed such a platform on a CMOS chip. The changes in the inter layer dielectric resistance within the chip represent the ingress, and are tracked by the implemented chip, which consists of a sensing array and an on-chip measurement engine. The measurement system uses a novel charge/discharge based time-mode resistance sensor that can be implemented using simple yet highly robust circuitry. The sensor array is implemented together with the measurement engine in a standard 0.18 m 6-metal CMOS process. The platform was validated through a series of dry and wet measurements. Wet measurements in saline demonstrated the sensitivity of the platform in detecting moisture/ion ingress. Such a platform could be used both in accelerated soak studies and during the implant's life-time for monitoring the integrity of the chips packaging.