FinFET and FDSOI structures could further improve transistor’s performance and, however, also introduce some new problems, especially the increasingly severer self-heating effect (SHE). In this paper, by utilizing the ultra-fast sub-1 ns measurement technique, I-V characteristics of FinFETs and FDSOI devices at different switch speeds are obtained. Furthermore, dynamic SHE phenomena as well as the time-resolved channel temperature change during transistor’s switch on and off are able to be experimentally observed. And, more accurate device parameters like ballistic transport efficiency are extracted by the ultra-fast measurements. Moreover, it is experimentally confirmed that several nanoseconds are required to heat up the channel of transistors by the direct electrical characterization and, therefore, in sub-10 nm devices, SHE might be alleviated under high frequency/speed operations.

In this work, the conductance method with an optimized circuit model is established to investigate the trapped charges at the ferroelectric/dielectric (FE/DE) interface. The density of interface states is quantitatively characterized to be $\sim 4 \times 10^{12}$ to 10 ¹³ cm $^{-2}\cdot eV^{-1}$ . And the injection and accumulation of these enormous interfacial charges play a key role in the operation of the FE/DE stack. The proposed measurement technique provides a comprehensive understanding of the FE/DE stack as well as some new insights of negative capacitance effect and ferroelectric field-effect transistor device operations.

We have experimentally demonstrated robust beta-gallium oxide ( $\beta $ -Ga ₂ O ₃ ) ferroelectric (FE) field-effect transistors (FeFETs) on a sapphire substrate operated up to 400 °C. Atomic layer deposited (ALD) Hf _0.5 Zr _0.5 O ₂ [hafnium zirconium oxide (HZO)] is used as the FE dielectric. The HZO/ $\beta $ -Ga ₂ O ₃ FeFETs are studied for their synaptic behavior applications at elevated temperatures. The devices show distinguishable polarization switching operation with the output conductance quasi-linearly controlled by the number of input pulses on the FE gate. In a simulation, on-chip learning accuracy reaches 94% at elevated temperatures using the Modified National Institute of Standards and Technology (MNIST) data set with a simple two-layer multilayer perceptron (MLP) network. These ultra wide bandgap semiconductor devices have the potential to fill the need for harsh environment neuromorphic applications.

In this letter, wake-up free La-doped HfO2-ZrO2 (HZO) ferroelectrics are experimentally fabricated using an atomic layer-specific doping (ALSD) technique, which selectively introduces La dopants at effective locations to facilitate the formation of ferroelectric orthorhombic phase. With this technique, robust La-doped HZO ferroelectric devices that are mostly free from the undesired wake-up effect and anti-ferroelectricity were demonstrated over a large La doping range (from 2.9 to 11.5%). Moreover, large remanent polarization and good endurance were achieved at the same time (>107 cycles). The outstanding performances can be attributed to the effective stabilization of ferroelectric orthogonal phase and the suppression of tetragonal phase, through controlling of the dopants’ local environment. Thus, ALSD is an effective approach to achieve reliable, wake-up free and CMOS-compatible HZO-based ferroelectrics.

The ferroelectric (FE) polarization switching behavior in the HfZrO₂ (HZO) FE/dielectric (FE/DE) stack is investigated systematically by charge responses from pulse measurements. The trapped charge density at the FE/DE interface related with the FE polarization switching is found to be 1.2x10¹⁴ cm⁻² according to the leakage-current-assist polarization switching mechanism. Furthermore, by the time-dependent nonswitching charge responses, the extra FE/DE interface trap density of 1.1x10¹³ cm⁻² is confirmed, which is not related but can be detected along with the FE polarization switching. The quantitative characterization reveals the huge amount of FE/DE interface traps and their dominant role in the FE operation of HZO FE/DE stack, which improves the proposed leakage-current-assist polarization switching model. This improved model provides a more comprehensive understanding of the polarization switching in the HZO FE/DE stack and new insights on HZO negative-capacitance (NC) and FE field-effect transistors (FETs).

In this letter, the real-time polarization switching process in HfZrO ₄ ferroelectric film is investigated at high speed (100 MHz, highest up-to-date) by using the ultrafast measurements system. Based on the measurements over a wide range of speed from ms to ns, clear and detailed time-dependent behaviors of the polarization switch of HfZrO ₄ are captured. HfZrO ₄ film with 10 nm in thickness still exhibits ferroelectric characteristics measured with a voltage sweep period from 4 ms to 20 ns and a voltage amplitude of 4 V. The phenomenon of polarization switching diminishes distinctively with the increase of measurement speed. When the measurement speed reaches as fast as 10 ns, the polarization process could not be clearly observed. Therefore, high-speed application of negative capacitance field-effect transistor should be optimized to prevent potential problems caused by the insufficient polarization.