Xuyan Chen

Dr. Xuyan Chen

orcid

Research Focus & Metrics

Academic Career Length

5Years (2022-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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20 July 2022 in Micromachines
Verified
Journal Article
Open access
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XCXuyan Chen
Xuyan Chen
ZCZhiming Chen
Zhiming Chen
LXLei Xiao
Lei Xiao
YHYigang Hao
Yigang Hao
HWHan Wang
Han Wang
ZZZiyue Zhang
Ziyue Zhang
High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and other devices. In this study, HAR TSVs with a diameter of 11 μm and an aspect ratio of 10:1 are successfully fabricated in a low-cost process flow. Conformal polyimide (PI) liners are deposited using a vacuum-assisted spin coating technique, and the effects of spin coating time and speed on the deposition results are discussed. Then, continuous Cu seed layers are fabricated by sequential sputtering and ultrasound-assisted electroless plating. Additionally, void-free and seamless Cu conductors are formed by electroplating. Moreover, a semi-additive method is used to fabricate the redistribution layers (RDLs) on the insulating layers of photosensitive PI (PSPI). Notably, a plasma bombardment process is introduced to remove residual PSPI in the contact windows between RDLs and central pillars. Results show that the resistance of a single TSV from a daisy chain of 144 TSVs with density of 2000/mm2 is about 28 mΩ. Additionally, the S-parameters of a single TSV are obtained using L-2L de-embedding technology, and the experimental and simulated results agree well. The proposed low-cost fabrication technologies and the related electrical characterization of PI-TSVs are significant for the application of HAR TSVs in modern heterogeneous integration systems.

12 August 2024 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
ZCZhiming Chen
Zhiming Chen
XCXuyan Chen
Xuyan Chen
HWHan Wang
Han Wang
ZCZiru Cai
Ziru Cai
MXMiao Xiong
Miao Xiong
ZZZiyue Zhang
Ziyue Zhang
Compared to conventional through-silicon-via (TSV) technology, coaxial TSVs can provide better radio frequency (RF) transmission performance in terms of reduced transmission loss and enhanced impedance matching in 2.5-D/3-D heterogeneous integration of RF microsystems. This article presents a novel fabrication scheme for coaxial TSVs comprised of Cu-pillar inner conductors, annular benzocyclobutene (BCB) insulators, and annular Cu outer conductors. Complete Cu conductors are achieved by the proposed double-sided etching and electroplating method, in which the outer and inner conductors are fabricated from the front and back sides of the wafer, respectively. Besides, a thick BCB insulator without voids is realized based on the vacuum-assisted spin-filling technique. Due to the good feasibility of the fabrication processes, the dimensions of the coaxial TSV can be flexibly designed to meet the requirements for impedance matching. Coaxial TSVs with a height of 85 $\mu $ m, an inner conductor diameter of 45 $\mu $ m, and an insulator thickness of 53 $\mu $ m are successfully fabricated. Measurement results show that the TSVs exhibit a low leakage current between the inner and outer conductors of 1.28 pA at 20 V, and the return loss and insertion loss are better than $-$ 16 and $-$ 0.35 dB up to 40 GHz, respectively. Such compact and low-loss coaxial TSV structure together with its fabrication scheme facilitates the miniaturized, high-density, and high-performance 2.5-D/3-D heterogeneous integration of microsystems at RF and millimeter-wave (MMW) frequencies.

1 January 2026 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
XCXuyan Chen
Xuyan Chen
ZCZhiming Chen
Zhiming Chen
ZZZiyue Zhang
Ziyue Zhang
JZJiaxuan Zhang
Jiaxuan Zhang
YSYuwen Su
Yuwen Su
YDYingtao Ding
Yingtao Ding