High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and other devices. In this study, HAR TSVs with a diameter of 11 μm and an aspect ratio of 10:1 are successfully fabricated in a low-cost process flow. Conformal polyimide (PI) liners are deposited using a vacuum-assisted spin coating technique, and the effects of spin coating time and speed on the deposition results are discussed. Then, continuous Cu seed layers are fabricated by sequential sputtering and ultrasound-assisted electroless plating. Additionally, void-free and seamless Cu conductors are formed by electroplating. Moreover, a semi-additive method is used to fabricate the redistribution layers (RDLs) on the insulating layers of photosensitive PI (PSPI). Notably, a plasma bombardment process is introduced to remove residual PSPI in the contact windows between RDLs and central pillars. Results show that the resistance of a single TSV from a daisy chain of 144 TSVs with density of 2000/mm² is about 28 mΩ. Additionally, the S-parameters of a single TSV are obtained using L-2L de-embedding technology, and the experimental and simulated results agree well. The proposed low-cost fabrication technologies and the related electrical characterization of PI-TSVs are significant for the application of HAR TSVs in modern heterogeneous integration systems.

Three-dimensional (3D) integration based on through-silicon-via (TSV) technology provides a solution to the miniaturization of electronic systems. In this paper, novel integrated passive devices (IPDs) including capacitor, inductor, and bandpass filter are designed by employing TSV structures. For lower manufacturing costs, polyimide (PI) liners are used in the TSVs. The influences of structural parameters of TSVs on the electrical performance of the TSV-based capacitor and inductor are individually evaluated. Moreover, with the topologies of capacitor and inductor elements, a compact third-order Butterworth bandpass filter with a central frequency of 2.4 GHz is developed, and the footprint is only 0.814 mm × 0.444 mm. The simulated 3-dB bandwidth of the filter is 410 MHz, and the fraction bandwidth (FBW) is 17%. Besides, the in-band insertion loss is less than 2.63 dB, and the return loss in the passband is better than 11.4 dB, showing good RF performance. Furthermore, as the filter is fully formed by identical TSVs, it not only features a simple architecture and low cost, but also provides a promising idea for facilitating the system integration and layout camouflaging of radio frequency (RF) devices.

Bandpass filters based on through-silicon-via (TSV) interposers offer advantages such as compact footprint, excellent radio frequency (RF) performance, simplified processing, and low cost. However, as power densities in three-dimensional (3D) integrated circuits continue to rise, thermal management has become a critical performance bottleneck. In this work, we present a TSV-based bandpass filter design where the TSVs feature annular Cu conductors with carbon nanotube (CNT) cores. The annular Cu structure provides the required vertical electrical connectivity, while the high-thermal-conductivity CNT core facilitates inter-layer heat dissipation. RF simulations confirm that the RF characteristics of the filter remain comparable to those of filters based on conventional TSVs with Cu-pillar conductors or TSVs with annular Cu conductors and polymer cores such as benzocyclobutene (BCB). In addition, multiphysics simulations demonstrate that the proposed filter exhibits a maximum steady-state temperature of only 89.1 °C with a 5 W constant heat source attached to the interposer surface and a heat sink at the bottom side, presenting an efficient reduction compared to the other two types. The filter also shows reduced thermally induced surface deformation, confirming the thermal benefits of the CNT cores. Furthermore, comprehensive parametric analyses involving the influences of critical TSV structural parameters on the TSV-based capacitors and inductors are performed, providing guidelines for customized filter design. We believe the proposed design highlights a promising pathway for addressing the thermal management challenges in high-density RF integrated microsystems.