A self-body-biasing technique is proposed for differential-drive cross-coupled (DDCC) rectifier, with its profound application in far-field RF energy-harvesting systems. The conventional source-to-body, and the proposed technique known as Lower DC Feeding (LDCF), were fabricated in the 130-nm CMOS and compared at the operation frequency of 500 MHz, 953 MHz and 2 GHz along with a corresponding load of 2 kΩ, 10 kΩ and 50 kΩ. The technique allows the PMOS transistors to operate with a dynamic threshold voltage (Vth) which improves the power conversion efficiency (PCE) when the rectifier is operating at a smaller received power. A 9.5% of improvement is achieved at the peak PCE when the rectifier is operating at 953 MHz, and driving a 10 kΩ load. A maximum PCE of 73.9% is measured at 2 GHz when driving a 2-kΩ load. The LDCF technique also offers a self-limiting capability for its output voltage, by reducing the PCE at larger received power. A limit-voltage level of 3.5 V is measured irrespective to the operating frequency and load. This capability aids the protection of the subsequent circuits in a wireless sensor from being overpowered.

The increasing demand for wireless Internet of Things (IoT) calls for power efficient RF energy harvesting approach. The current dominant single-band RF energy harvesting front-end system restricts itself to a single frequency, which is at the risk of ineffective operation when the harvesting frequency is unavailable. This paper reviews and explores the alternative approach of a multiband RF energy-harvesting front-end system. It covers all essential circuitry of a multiband RF energy harvesting front-end system, starting from the recent RF surveys which investigate the typical, usable, and high-strength RF input, to the overview of the state-of-the-art antenna, impedance matching network (IMN), and RF-DC rectifier. The recent advancement of the multiple RF input harvesting abilities, reflection loss minimization, and performance improvement are comprehensively reviewed for different operating conditions, and this review also presents the advantages and disadvantages of the different circuit architecture combinations for multiband RF energy harvesting front-end systems. In summary, this review aims to fill the research gap in the further advancement of multiband RF energy harvesting towards enhancing its performance through optimal circuit integration of the front-end system.

This article investigates the latest research outcomes on the wide power dynamic range (PDR) CMOS RF-DC rectifier for on-chip radio frequency energy harvesting (RFEH) system as a viable approach to extend the high power conversion efficiency (PCE) operating range which is limited by the varying nature of the available far-field RF power. The significance of enhancing the rectifier’s PDR is that it offers a more reliable operation of RFEH in real-life applications. Therefore, this review seeks to navigate the research and development focus of the RFEH system towards extending the PDR of the CMOS RF-DC rectifier by providing analysis of the effect of state-of-the-art PDR extension techniques and their design tradeoffs. The review encapsulates the transmission of the RF power, a brief overview of the RFEH front-end circuit, and a comprehensive review of the CMOS rectifier design focusing on PDR. At the end of this article, we discuss the future design aspects to address the limitation of the RFEH system. Recent research shows that extending the rectifier’s PDR will enhance the overall performance of the RFEH system.

This Brief reports a cross-coupled differential-drive (CCDD) rectifier with a wide dynamic range (DR) in its power conversion efficiency (PCE). Specifically, it features a self-body-biasing technique to reduce the forward V _th , along with the diode-connected MOSFETs to stem the reverse-leakage current while improving the forward current. The merits of our CCDD rectifier are exemplified via two input-capacitor-coupling configurations: shared-capacitor coupling (SCC) and individual-capacitor coupling (ICC). Fabricated in 0.13- μm CMOS, the SCC-CCDD and ICC-CCDD measure a DR of 13 and 14.5 dB, respectively, for a PCE >40%. Alternatively, the SCC-CCDD exhibits a peak PCE of 83.7% with a sensitivity of -19.2 dBm at 1 V, whereas the ICC-CCDD shows a peak PCE of 80.3% with a sensitivity of -18.7 dBm.