Low-density parity-check (LDPC) codes have been widely adopted to guarantee data reliability in 3-D NAND flash memory. However, the iterative LDPC decoding algorithm leads to high decoding latency due to the iterative message transfer mechanism. Using a field-programmable gate array (FPGA) testbed, we first present the binary channel in NAND flash and analyze the single-symbol log-likelihood ratio (LLR) variation with the decoding iterations. Subsequently, we investigate the raw bit error ratio (RBER) characteristics of intra-page frames. To reduce the number of iterative decoding, we propose a frame feedback information aware decoding algorithm (FFIA-DA), combined with the single-symbol LLR variation and the similar error characteristics among intra-page frames. The proposed method uses the decoding feedback information of one frame to decrease the number of decoding iterations of other frames with similar RBER. Experiments show that the proposed approach can improve the decoding performance of LDPC and speed up decoding convergence.

As high-speed big-data communications impose new requirements on storage latency, low-density parity-check (LDPC) codes have become a widely used technology in flash-memory channels. However, the iterative LDPC decoding algorithm faces a high decoding latency problem due to its mechanism based on iterative message transmission. Motivated by the unbalanced bit reliability of codeword, this paper proposes two technologies, i.e., serial entropy feature-based layered normalized min-sum (S-EFB-LNMS) decoding and parallel entropy feature-based layered normalized min-sum (P-EFB-LNMS) decoding. First, we construct an entropy feature vector that reflects the real-time bit reliability of the codeword. Then, the reliability of the output information of the layered processing unit (LPU) is evaluated by analyzing the similarity between the check matrix and the entropy feature vector. Based on this evaluation, we can dynamically allocate and schedule LPUs during the decoding iteration process, thereby optimizing the entire decoding process. Experimental results show that these techniques can significantly reduce decoding latency.