This paper presents an innovative approach toward the automation of the placement task of analog integrated circuit layout design by using an artificial neural network that generates multiple valid floorplan solutions at push-button speed. The proposed model extends the knowledge mining of the most recent layout generation techniques as an end-to-end approach. A novel loss function is used in a semi-supervised fashion for the model to learn how to generate effective placements that follow topological constraints instead of simply trying to copy devices' locations from some pre-existing labeled dataset of placement solutions. Thus, in addition to eliminating the need for a large dataset of placed sizing solutions for training, the model generalizes better and outputs better layouts for solutions outside the training set. Moreover, one step further is taken towards a model that can predict the placement of different circuit topologies by supporting different encodings (with different number of devices) on the input layer of the artificial neural networks, ultimately fostering an opportunity to reuse incomplete legacy layout information. As proof of concept, the one ANN trained for 2 amplifier topologies is used to produce multiple placement recommendations in less than 40 ms for new designs.

The layout design of analog integrated circuits has been defying all automation attempts, and it is still primarily a handcrafting process carried by circuit designers on traditional layout editing frameworks. This paper presents a toolbox based on deep learning techniques and a sturdy graphical user interface to assist designers during that process. The underlying mechanism of this toolbox relies on a simple pairwise device interaction circuit description, i.e., the circuits’ topological constraints, to propose valid floorplan solutions for block-level structures, including topologies and deep nanometer technology nodes not used for its training, at push-button speed. Despite its automatic functionalities, the toolbox is focused on explainable artificial intelligence, involving the designer in the synthesis flow via filtering and editing options over the candidate floorplan solutions. This constant state of human-machine feedback environment turns the designer aware of the impact of each device’s position change and inherent tradeoffs while suggesting subsequent moves, ultimately increasing the designers’ productivity in this time-consuming and iterative task. Finally, the toolbox is shown to instantly generate floorplans with similar or better constraint fulfilment than human designed solutions for state-of-the-art analog circuit blocks.